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MAX14508E Ver la hoja de datos (PDF) - Maxim Integrated

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MAX14508E Datasheet PDF : 14 Pages
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MAX14508E–MAX14511E/
MAX14509AE
USB 2.0 Hi-Speed and Audio Switches
with Negative Signal Capability
Detailed Description
The MAX14508E–MAX14511E/MAX14509AE are high-
ESD-protected single DPDT switches that operate from
a +2.7V to +5.0V supply and are designed to multiplex
USB 2.0 Hi-Speed signals and AC-coupled analog signals.
These switches combine the low on-capacitance (CON)
and low on-resistance (RON) necessary for high-
performance switching applications. These devices meet
the requirements for USB low-speed and full-speed signaling.
The negative signal capability of the analog channel
allows signals below ground to pass through without distortion.
Analog Signal Levels
The MAX14508E–MAX14511E/MAX14509AE are bidirectional,
allowing ANO_, UNC_, and COM_ to be configured as
either inputs or outputs. Note that UNC_ and ANO_ are
only protected against ESD up to ±2kV (Human Body
Model) and may require additional ESD protection if used
as outputs. These devices feature a charge pump that
generates a negative supply to allow analog signals as
low as VCC - 5.0V to pass through ANO_. This allows
AC-coupled signals that drop below ground to pass when
operating from a single power supply. The negative charge
pump is controlled by the enable line and the output of the
COM_ fault protection circuit. The negative charge pump
is active when EN is high and VCOM_ < VFP. Note that if
the fault protection is activated by a COM_ voltage greater
than VFP, there must not be a negative voltage attached
to the ANO_ inputs. For the MAX14508E/MAX14509E/
MAX14509AE connect negative signals to ANO_ or
COM_ only when EN is driven high.
Overvoltage Fault Protection
The MAX14508E–MAX14511E feature overvoltage
fault protection on COM_, allowing compliance with
USB requirements for voltage levels. Fault protection is
triggered if the voltage applied to COM_ rises above VFP,
protecting the switch and USB transceiver from damaging
voltage levels.
VBUS Detection Input
The MAX14510E/MAX14511E feature a VBUS detection
input (VB) that connects COM_ to UNC_ when VVB
exceeds the VBUS detection threshold (VVBDET). For
applications where VBUS is always present, drive the
Audio Override Input (AOR) high to connect ANO_ to
COM_ (see the MAX14510E/MAX14511E Functional
Diagrams/Truth Table). Drive AOR low to have VB
control the switch position. Drive AOR rail-to-rail to
minimize power consumption.
Digital Control Input (CB)
The MAX14508E/MAX14509E/MAX14509AE provide a
single-bit control logic input, CB. CB controls the switch
position as shown in the MAX14508E/MAX14509E/
MAX14509AE Functional Diagrams/Truth Table. Drive
CB rail-to-rail to minimize power consumption.
Enable Input (EN)
The MAX14508E/MAX14509E/MAX14509AE feature a
shutdown mode that reduces the supply current to less
than 10nA and places the switches in high impedance.
Drive EN low to place the devices in shutdown mode.
Drive EN high for normal operation.
Click-and-Pop Suppression
The switched 100Ω shunt resistors on the MAX14508E/
MAX14510E automatically discharge any capacitance
at the ANO_ terminals when they are unconnected from
COM_. This reduces audio click-and-pop sounds that may
occur when switching between USB and audio sources.
Applications Information
Extended ESD Protection
ESD-protection structures are incorporated on all pins
to protect against electrostatic discharges up to ±2kV
(Human Body Model) encountered during handling and
assembly. COM1 and COM2 are further protected against
ESD up to ±15kV (Human Body Model) without damage.
The ESD structures withstand high ESD both in
normal operation and when the device is powered
down. After an ESD event, the MAX14508E–MAX14511E/
MAX14509AE continue to function without latchup.
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents test
setup, test methodology, and test results.
Human Body Model
Figure 5 shows the Human Body Model. Figure 6 shows
the current waveform it generates when discharged into a
low impedance. This model consists of a 100pF capacitor
charged to the ESD voltage of interest that is then dis-
charged into the device through a 1.5kΩ resistor.
Layout
USB Hi-Speed requires careful PCB layout with 45Ω
single-ended/90Ω differential controlled-impedance
matched traces of equal lengths. Ensure that bypass
capacitors are as close to the device as possible. Use
large ground planes where possible.
www.maximintegrated.com
Maxim Integrated 11

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