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M61880FP Ver la hoja de datos (PDF) - Renesas Electronics

Número de pieza
componentes Descripción
Fabricante
M61880FP
Renesas
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M61880FP Datasheet PDF : 21 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
M61880FP
Block Diagram
Reference voltage input Vr 6
Monitoring photodiode
current input
Reference voltage
Monitoring load resistance
output
connection pins
Laser current
Laser current
output
load resistance
1RM 2RM
PD
LD
Vref
RO
11 12
15
17
5
19
IPD
Comparator
Reference
voltage
source
Sample-and-hold
control input
S/H 8
Hold capacitance
connection pin
CH 7
Switching current setting
resistance connection pin
RS
1
Bias current setting
voltage input
VB 4
Bias current setting
RB 3
resistance connection pin
Sample-and-hold circuit
Current switching
circuit
Bias current
source
(IB)
40mA max
Switching current
source
(Isw)
100mA max
ISW+IB=100mA (max)
VCC1, GND1: For IC internal analog system
VCC2, GND2: For IC internal digital system
14 DATA Switching data input
9 VCC1 Power supply 1
20 VCC2 Power supply 2
2 GND1 Ground 1
16 GND2 Ground 2
13 ENB
Laser current enable
control input
Function Overview
The M61880FP is a semiconductor laser diode driver/controller that automatically performs drive and laser power
control of a type of semiconductor laser diode in which the semiconductor laser diode (LD) anode and monitoring
photodiode (PD) cathode are connected to the stem.
Laser power control operation is performed by connecting an external capacitance to the CH pin and applying a
reference voltage to the Vr pin.
The PD current resulting from LD light emission flows to a resistance connected between 1RM and 2RM, and
generates a voltage (VM). This VM voltage is compared with the voltage applied to the Vr pin, and if VM < Vr, the
current from the CH pin is taken as a source current and an external capacitance is charged.
If VM > Vr, the current from the CH pin is taken as a sink current and the external capacitance charge is discharged.
This operation is performed when S/H input = “L” and DATA input = “L” (sampling). When S/H input = “H”, the CH
pin goes to the high-impedance state (hold) irrespective of the state of VM, Vr, and the DATA input.
The LD drive current is composed of switching current ISW controlled by DATA input and LD bias current IB
unrelated to the DATA input state.
Rev.1.0, Sep.19.2003, page 2 of 20

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