TB62718AFG Ver la hoja de datos (PDF) - Marktech Optoelectronics

Número de pieza

componentes Descripción

Fabricante

TB62718AFG

Controller and Driver for Full-color LED Modules and Panels

Marktech Optoelectronics 

TB62718AFG

Parallel data transfer: All dot adjustment DAC3. (data register PI REG1 [7:0])

Process

PI DATA

[7:0]

PI CLK PI LATCH PI SEL

PO DATA

[7:0]

Operation and Function

1

L

(×1)

H or L

2

L

(×1)

Selects total dot adjustment (8-bit, 3-bit and 5-bit) for input

H

H or L data. Data is transferred to PI REG1 on 128th positive

edge of PI CLK.

H

No Holds the data transferred to PI REG1. Set is reflected on

change all dot adjustment from the moment when it is held.

Parallel data transfer timing (all dot adjustment, PI SEL = H, single device)

RESET

PI SEL

PI DATA

[7:0]

PI CLK

PI LATCH

111_11111

Data held on positive edge of PI LATCH after data

transfer by single device (after 1 clock cycle)

PO DATA

[7:0]

000_00000

Indicates undefined logic state

after reset and before input.

111_11111

PO DATA is synchronized with 1st clock

cycle after reset, and the first data is output.

Parallel data transfer timing

(all dot adjustment, PI SEL = H, two devices connected in cascade)

RESET

PI SEL

PI DATA

[7:0]

PI CLK

111_11111

PI LATCH

PO DATA [7:0]

(1st device)

000_00000

111_11111

Indicates undefined

logic state after reset

and before input.

110_11110

101_11101

Data held on

positive edge of

PI LATCH after

the data

110_11110

transfer by two

devices

(2 clock cycles)

PO DATA is synchronized with 2nd clock

cycle after reset, and the second data is

output.

PO DATA is synchronized with 1st clock

cycle after reset, and the first data is output.

17

2005-04-20

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