Memory Ics
BR24C08 / BR24C08F / BR24C08FJ / BR24C08FV / BR24C16/ BR24C16F /
BR24C16FJ / BR24C16FV / BR24E16 / BR24E16F / BR24E16FJ / BR24E16FV
zBlock diagram
BR24C08 / F / FJ / FV
A0 1
A1 2
A2 3
GND 4
8kbits EEPROM ARRAY
10bits
ADDRESS
SLAVE· WORD
DECODER 10bits ADDRESS REGISTER
8bits
DATA
REGISTER
START
STOP
CONTROL LOGIC
ACK
HIGH VOLTAGE GEN.
VCC LEVEL DETECT
8 VCC
7 WP
6 SCL
5 SDA
Pin name I / O
Function
VCC
− Power supply
GND
− Ground (0V)
A0, A1
− Out of use. Please connect to GND.
A2
I Slave address set
SCL
I Serial clock input
SDA
Slave and word address,
I / O serial data input, serial data output ∗
WP
I Wite protect pin
∗An open drain output requires a pull-up resistor.
BR24C16 / F / FJ / FV
A0 1
A1 2
A2 3
GND 4
16kbits EEPROM ARRAY
11bits
ADDRESS
SLAVE· WORD
DECODER 11bits ADDRESS REGISTER
8bits
DATA
REGISTER
START
STOP
CONTROL LOGIC
ACK
HIGH VOLTAGE GEN.
VCC LEVEL DETECT
8 VCC
7 WP
6 SCL
5 SDA
Pin name I / O
Function
VCC
− Power supply
GND
− Ground (0V)
A0, A1, A2 I Out of use. Please connect to GND.
SCL
SDA
I Serial clock input
Slave and word address,
I / O serial data input, serial data output
∗
WP
I Wite protect pin
∗An open drain output requires a pull-up resistor.
BR24E16 / F / FJ / FV
A0 1
A1 2
A2 3
GND 4
16kbits EEPROM ARRAY
11bits
ADDRESS
SLAVE· WORD
DECODER 11bits ADDRESS REGISTER
8bits
DATA
REGISTER
START
STOP
CONTROL LOGIC
ACK
HIGH VOLTAGE GEN.
VCC LEVEL DETECT
8 VCC
Pin name I / O
Function
7 WP
VCC
GND
− Power supply
− Ground (0V)
6 SCL
A0, A1, A2 I Slave address set
SCL
I Serial clock input
5 SDA
SDA
WP
Slave and word address,
I / O serial data input, serial data output
∗
I Wite protect pin
∗An open drain output requires a pull-up resistor.