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M80C286

HIGH PERFORMANCE CHMOS MICROPROCESSOR WITH MEMORY MANAGEMENT AND PROTECTION

Intel 

M80C286

Gate Descriptor

271103 – 11

Must be set to 0 for compatibility with 80386 (X is don’t care)

Gate Descriptor Fields

Name

TYPE

P

DPL

WORD

COUNT

DESTINATION

SELECTOR

DESTINATION

OFFSET

Value

4

5

6

7

0

1

0–3

0– 31

16-bit

selector

16-bit

offset

Description

–Call Gate

–Task Gate

–Interrupt Gate

–Trap Gate

–Descriptor Contents are not

valid

–Descriptor Contents are

valid

Descriptor Privilege Level

Number of words to copy

from callers stack to called

procedures stack Only used

with call gate

Selector to the target code

segment (Call Interrupt or

Trap Gate)

Selector to the target task

state segment (Task Gate)

Entry point within the target

code segment

Figure 13 Gate Descriptor Format

Exception 13 is generated when the gate is used if a

destination selector does not refer to the correct de-

scriptor type The word count field is used in the call

gate descriptor to indicate the number of parameters

(0–31 words) to be automatically copied from the

caller’s stack to the stack of the called routine when

a control transfer changes privilege levels The word

count field is not used by any other gate descriptor

The access byte format is the same for all gate de-

scriptors P e 1 indicates that the gate contents are

valid P e 0 indicates the contents are not valid and

causes exception 11 if referenced DPL is the de-

scriptor privilege level and specifies when this de-

scriptor may be used by a task (refer to privilege

discussion below) Bit 4 must equal 0 to indicate a

system control descriptor The TYPE field specifies

the descriptor type as indicated in Figure 13

SEGMENT DESCRIPTOR CACHE REGISTERS

A segment descriptor cache register is assigned to

each of the four segment registers (CS SS DS ES)

Segment descriptors are automatically loaded

(cached) into a segment descriptor cache register

(Figure 14) whenever the associated segment regis-

ter is loaded with a selector Only segment descrip-

tors may be loaded into segment descriptor cache

registers Once loaded all references to that seg-

ment of memory use the cached descriptor informa-

tion instead of reaccessing the descriptor The de-

scriptor cache registers are not visible to programs

No instructions exist to store their contents They

only change when a segment register is loaded

SELECTOR FIELDS

A protected mode selector has three fields descrip-

tor entry index local or global descriptor table indi-

cator (TI) and selector privilege (RPL) as shown in

Figure 15 These fields select one of two memory

based tables of descriptors select the appropriate

table entry and allow highspeed testing of the selec-

tor’s privilege attribute (refer to privilege discussion

below)

271103 – 12

Figure 15 Selector Fields

Figure 14 Descriptor Cache Registers

271103 – 13

14

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