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VPX3214C

Video Pixel Decoders

Micronas 

PRELIMINARY DATA SHEET

VPX 3220 A, VPX 3216 B, VPX 3214 C

Video Pixel Decoder Family

Release Notes: Revision bars indicate significant

changes to the previous edition.

1. Introduction

The Video Pixel Decoder (VPX) is a full-feature video ac-

quisition IC for consumer video and multimedia applica-

tions. All of the processing necessary to convert an ana-

log video signal into a digital component stream has

been integrated onto a single 44-pin IC. Its notable fea-

tures include:

– single chip multistandard color decoding NTSC/PAL/

SECAM/S-VHS, NTSC with chroma comb filter.

– two 8-bit video A/D converters with clamping and au-

tomatic gain control (AGC)

– four analog inputs with integrated selector for

3 composite video sources (CVBS), or

2 YC sources (SVHS), or

2 composite video sources and one YC source.

– automatic standard detection

– horizontal and vertical sync detection for all standards

– hue, brightness, contrast, and saturation control

– horizontal resizing between 32 and 1056 pixel/line

– vertical resizing by line dropping

– high quality anti-aliasing filter (VPX 3220 A only)

– ITU-R601 level compatible

– YCbCr (4:4:4, 4:2:2, or 4:1:1) or

γ-corrected RGB 4:4:4 (15, 16, or 24 bits)

compressed Video (DPCM 8 bit)

(VPX 3214 C supports only YCrCb 4:2:2)

– alpha key generation

(only VPX 3220 A, and VPX 3216 B)

– 8-bit or 16-bit synchronous output mode

– asynchronous output mode via FIFO with status flags

– VBI bypass mode for Teletext, Closed Caption, and

Intercast

– 44-pin plastic package (PLCC, TQFP)

– total power consumption under 1 W

– I2C serial control, selectable power-up default state

– on-chip clock generation

– IEEE 1149.1 (JTAG) boundary scan interface

VPX 3220 A, VPX 3216 B, and VPX 3214 C are pin and

software compatible, but differ slightly in the feature set.

1.1. Difference between VPX 3220 A and VPX 3216 B

VPX 3220 A performs low-pass filtering before resam-

pling the data, whereas VPX 3216 B does not. For more

info, see Fig. 1–1 and refer to section 2.3.

1.2. Difference between VPX 3216 B and VPX 3214 C

The VPX 3214 C is based on the VPX 3216 B but without

color space conversion. VPX 3214 C supports only

YCbCr 4:2:2.

1.3. System Architecture

The block diagram in Fig. 1–1 illustrates the signal flow

through the VPX. A sampling stage performs 8-bit A/D

conversion, clamping, and AGC. The color decoder sep-

arates the luma and chroma signals, demodulates the

chroma, and filters the luminance. A sync slicer detects

the sync edge and computes the skew relative to the

sample clock. The component processing stage resizes

the YCbCr samples, adjusts the contrast and bright-

ness, and interpolates the chroma. The color space

stage contains a dematrix, a γ–1 correction, a DPCM-like

encoder, and an alpha key generator. The format stage

arranges the samples into the selected byte format and

(in the case of asynchronous output) buffers the data for

output.

CVBS/Y

Chroma

Sampling

Sync

Luma

Y

Filter

Chroma

Demod.

Line Store

CbCr

Skew

YCbCr

YCbCr/

RGB

Alpha

Key

Color Decoder

Component

Processing

Color Space

Output

MUX

H/V

Sync

A

B

Clock

Fig. 1–1: Block diagram of the VPX

MICRONAS INTERMETALL

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