TE28F800C3BA90 Ver la hoja de datos (PDF) - Intel
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TE28F800C3BA90 Datasheet PDF : 68 Pages
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Intel£ Advanced+ Boot Block Flash Memory (C3)
Table 15. Read Operations—32 Mbit Density
Density
32 Mbit
Product
70 ns
90 ns
100 ns
110 ns
#
Sym
Para-
meter
Unit Notes
VCC 2.7 V–3.6 V 2.7 V–3.6 V 3.0 V–3.3 V 2.7 V–3.3 V 3.0 V–3.3 V 2.7 V–3.3 V
Min Max Min Max Min Max Min Max Min Max Min Max
R1 tAVAV Read Cycle Time 70
90
90
100
100
110
ns
R2
tAVQ Address to Output
V Delay
70
90
90
100
100
110 ns
R3
tELQ CE# to Output
V Delay
70
90
90
100
100
110 ns
R4
tGLQ OE# to Output
V Delay
20
20
30
30
30
30 ns
R5
tPHQ RP# to Output
V Delay
150
150
150
150
150
150 ns
R6
tELQ CE# to Output in
X Low Z
0
0
0
0
0
0
ns
R7
tGLQ OE# to Output in
X Low Z
0
0
0
0
0
0
ns
R8
tEHQ CE# to Output in
Z High Z
20
20
20
20
20
20 ns
R9
tGHQ OE# to Output in
Z High Z
20
20
20
20
20
20 ns
Output Hold from
Address, CE#, or
R10 tOH OE# Change,
0
0
0
0
0
0
ns
Whichever
Occurs First
NOTES:
1. OE# may be delayed up to tELQV–tGLQV after the falling edge of CE# without impact on tELQV.
2. Sampled, but not 100% tested.
3. See Figure 8, “Read Operation Waveform” on page 42.
4. See Figure 11, “AC Input/Output Reference Waveform” on page 49 for timing measurements and maximum allowable
input slew rate.
3,4
3,4
1,3,4
1,3,4
3,4
2,3,4
2,3,4
2,3,4
2,3,4
2,3,4
Datasheet
41
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