SC2677 Ver la hoja de datos (PDF) - Semtech Corporation

Número de pieza

componentes Descripción

Fabricante

SC2677

Dual Synchronous Voltage Mode Controller with Current Sharing Circuitry

Semtech Corporation 

POWER MANAGEMENT

Pin Configuration

Top View

SC2677

Ordering Information

Device(1)

SC2677TSTR

SC2677TSTRT(2)

SC2677EVB-1

SC2677EVB-2

Package

TSSOP-20

TSSOP-20

Current Share Evaluation Board

Dual Channel Evaluation Board

Notes:

(1) Only available in tape and reel packaging. A reel con-

tains 2500 devices.

(2) Lead free package.

(TSSOP-20 Pin)

Pin Descriptions

EXPANDED PIN DESCRIPTION

Pin 1: (VREF)

Internal 0.5V reference. Connected to the + input of

the master channel error amplifier.

Pin 2: (FREQ)

External frequency adjustment. Connect a resistor to

AGND to set the switching frequency. Please see

more information in Application section.

Pin 3: (VCC)

Bias pin for the controller. Connect a ceramic

decoupling capacitor from this pin to AGND with

minimum trace length.

Pin 4: (+IN2)

“+” input of the slave error amplifier.

Pin 5, 16: (-IN2, -IN1)

“-” inputs of the error amplifiers.

Pin 6, 15: (COMP2, COMP1)

Compensation pins of the error amplifiers.

Pin 7, 14: (BST2, BST1)

Supply pins for the high side drivers. Usually con-

nected to bootstrap circuit.

Pin 8, 13: (DH2, DH1)

Gate drive pins for the top MOSFETs. Requires a

small series resistor.

Pin 9, 12: (DL2, DL1)

Gate drive pins for the bottom MOSFETs. Requires a

small series resistor.

Pin 10: (PGND)

Power GND. Return of the high side and low side gate

drivers.

Pin 11: (BSTC)

Supply pin for bottom MOSFET gate drivers.

Pin 17: (PHASING)

This pin controls the phase shift between master and

slave for optimum noise immunity. Use a resistive

divider from the FREQ pin (pin 2) to AGND, and

connect the tap of the resistive divider to pin 17.

Please see more information in Application section.

Pin 18: (SS/ENA)

Soft start pin. Connect a ceramic capacitor from this

pin to AGND, and there is an internal current source

charging up this capacitor during soft start. The PWM

operation can be disabled if this pin is pulled low.

Pin 19: (PWRGD)

Power good signal. This is an open collector output. It

is pulled low internally if output voltage is outside the

power good window.

Pin 20: (GND)

Analog GND. Return of the analog signals and bias of

the chip.

© 2004 Semtech Corp.

4

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