PM6685TR(2011) Ver la hoja de datos (PDF) - STMicroelectronics

Número de pieza

componentes Descripción

Fabricante

PM6685TR
(Rev.:2011)

Dual step-down main supply controller with auxilary voltages for notebook system power

STMicroelectronics 

PM6685

Pin settings

Table 2. Pin functions (continued)

Pin Name

Description

19

VIN

Device input supply voltage. A bypass filter (4W and 4.7mF) between the battery and this pin is

recommended.

20

CSENSE5

Current sense input for the 5V section. This pin must be connected through a resistor to the

drain of the synchronous rectifier (RDSON sensing) to set the current limit threshold.

21 PHASE5 Switch node connection and return path for the high side driver for the 5V section.

22 HGATE5 High-side gate driver output for the 5V section.

23 BOOT5 Bootstrap capacitor connection for the 5V section. It supplies the high-side gate driver.

Pulse skip mode control input.

– If the pin is connected to LDO5 the PWM mode is enabled.

24 SKIP – If the pin is connected to GND, the pulse skip mode is enabled.

– If the pin is connected to VREF the pulse skip mode is enabled but the switching frequency is

kept higher than 33kHz (No-audible pulse skip mode).

5V SMPS enable input.

– The 5V section is enabled applying a voltage greater than 2.4V to this pin.

25

EN5 – The 5V section is disabled applying a voltage lower than 0.8V.

When the section is disabled the High Side gate driver goes low and Low Side gate driver goes

high.

Power Good signal for the 5V section. This pin is an open drain output.

26 PGOOD5 The pin is pulled low if the output is disabled or if it is out of approximately +/- 10% of its nominal

value.

Power Good signal for the 3.3V section. This pin is an open drain output.

27 PGOOD3 The pin is pulled low if the output is disabled or if it is out of approximately +/- 10% of its nominal

value.

Control pin for the 3.3V internal linear regulator. This pin determines three operative modes for

the LDO3.

28

LDO3SEL

– If LDO3_SEL pin is connected to GND the LDO3 output is always disabled.

– If LDO3_SEL pin is connected to LDO5 the LDO3 internal regulator is always enabled.

– If LDO3_SEL pin is connected to VREF and OUT3 is greater than about 3V, the LDO3

regulator shuts down and the LDO3 pin is be directly connected to OUT3 through a 3W (max)

switch.

29

OUT5

Output voltage sense for the 5V switching section.This pin must be directly connected to the

output voltage of the switching section.

30 COMP5 DC voltage error compensation pin for the 5V switching section.

31

VCC

Device Supply Voltage pin. It supplies the all the internal analog circuitry except the gate drivers

(see LDO5). Connect this pin to LDO5.

32

VREF

High accuracy output voltage reference (1.230V). It can deliver 50uA. Bypass to SGND with a

100nF capacitor.

33 EXP PAD Exposed pad.

Doc ID 11674 Rev 8

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