MX28F1000P Ver la hoja de datos (PDF) - Macronix International

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MX28F1000P

1M-BIT [128K x 8] CMOS FLASH MEMORY

Macronix International 

MX28F1000P

COMPATIBLE BLOCK ERASE

This device can be applied to the compatible block erase

algorithm shown in the following flowchart. This algorithm

allows to obtain faster erase time by the block (16K byte

COMPATIBLE BLOCK ERASE FLOWCHART

x 8 block) without any voltage stress to the device nor

deterioration in reliability of data.

START

For selected block(s),

All bits PGM"0"

N=0

BLOCK ERASE FLOW

P/N: PM0340

BLOCK ERASE FLOW

N = N+1

FAIL

ERSVFY FLOW

NO

N = 1024?

ALL BITS VERIFIED

YES

APPLY

VPP = VCC

BLOCK ERASE FAIL

END

BLOCK ERASE

COMPLETE

START

Apply

VPP = VPPH

WRITE SETUP BLOCK ERASE COMMAND

( 60H )

WRITE BLOCK ERASE COMMAND

( LOAD FIRST SECTOR ADDRESS , 60H )

LOAD OTHER SECTORS' ADDRESS

IF NECESSARY

( LOAD OTHER SECTOR ADDRESS )

WAIT

10 ms

END

23

REV. 1.6, JAN. 19, 1999

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