MC1141A Ver la hoja de datos (PDF) - Unspecified

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MC1141A

Advanced Microstepping Motion Control Chipset

Unspecified 

IC

Pin Name

Pin #

CP Chip Pinouts

CP

PWMMag1A 8

PWMMag1B 7

PWMMag2A 2

PWMMag2B 1

CP

PWMSign1A 56

PWMSign1B 55

PWMSign2A 54

PWMSign2B 53

CP

PosLimit1

52

PosLimit2

45

CP

NegLimit1

51

NegLimit2

44

CP

DAC16Addr0 30

DAC16Addr1 29

CP

ClkIn

24

Description/Functionality

PWM motor output magnitude signals (output). When the chip set is in PWM output mode

these pins provide the Pulse Width Modulated magnitude signal to the motor amplifier. Two

phases of command signal are output per motor axis, indicated phase A and phase B, with

the axis number indicated 1 or 2.

NOTE: For MC1241A all four pins are valid. For MC1141A pins for axes 1 only are valid.

Invalid axis pins can be left unconnected.

The PWM resolution is 10 bits, frequency = 97.6 kHz.

PWM motor output direction signals (output). When the chip set is in PWM output mode

these pins provide the sign signal to the motor amplifier. Two phases of command signals are

output per motor axis, indicated phase A and phase B, with the axis number indicated 1 or 2.

NOTE: For MC1241A all four pins are valid. For MC1141A pins for axes 1 only are valid.

Invalid axis pins can be left unconnected.

Positive limit switch input for axis 1-2. These signals provide directional limit inputs for the

positive-side travel limit of the axis. Upon powerup these signals default to "active high"

interpretation, but the interpretation can be set explicitly using the SET_LMT_SENSE

command. (See Host Command Section for more info.) If not used these signals should be

tied low for the default interpretation, or tied high if the interpretation is reversed.

NOTE: For MC1241A both pins are valid. For MC1141A pins for axes 1 only are valid. Invalid

axis pins can be left un connected.

Negative limit switch input for axis 1-2. These signals provide directional limit inputs for the

negative-side travel limit of the axis. Upon powerup these signals default to "active high"

interpretation, but the interpretation can be set explicitly using the SET_LMT_SENSE

command. (See Host Command Section for more info.) If not used these signals should be

tied low for the default interpretation, or tied high if the interpretation is reversed.

NOTE: For MC1241A both pins are valid. For 1141 pins for axis 1 only are valid. Invalid axis

pins can be left un connected.

Axis Address used during 16-bit DAC motor command output. These signals encode the

motor output axis address as shown in the table below:

Dac16Addr1

Low

Low

High

High

Dac16Addr0

Low

High

Low

High

Addressed Encoder

Axis 1 phase A

Axis 1 phase B

Axis 2 phase A

Axis 2 phase B

To write a valid DAC motor command value DACSlct (I/O chip) and I/OAddr0-3 (CP chip)

must be high, and I/OWrite (CP chip) must be low. The 16 bit DAC data word is organized as

follows: High twelve bits are in Data0-11 (CP chip), and low 4 bits are in DACLow0-3 (CP

chip).

Clock In (input). This pin provides the chip set master clock (Fclk = 25.0 Mhz)

15

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