MC1151A Ver la hoja de datos (PDF) - PMD
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MC1151A Datasheet PDF : 51 Pages
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Electrical Characteristics
Overview
The MC1451A-consists of either two 68 pin PLCC's (standard version),
or these same two I.C.s with an additional 44 pin PLCC for incremental
encoder feedback (-E version). All of these devices are fabricated in
CMOS. The two 68 pin PLCCs are known as the I/O and the CP chips.
The 44-pin PLCC is known as the ENC chip.
The Peripheral Input/Output IC (I/O chip) is responsible for interfacing
to the host processor and for generating the high speed pulse and
direction output. The Command Processor IC (CP chip) is responsible
for all host command, trajectory, and related computations. The ENC
chip is responsible for incremental encoder feedback.
The following figure shows a typical system block diagram, along with
the pin connections between the I/O chip, CP chip, and ENC chip if it is
used.
Motor
(4 axis)
Amplifier
(1-4 axis)
Encoder
(1-4 axis)
Data4-11
Data4-11
I/OAddr0-3
I/OAddr0-3
I/O
I/OWrite
CP
I/OWrite
ENC
I/OCntrl0-3
I/OCntrl0-3
ClkOut
ClkOut
Host
Processor
Use of the ENC chip does not require a special version of the I/O or CP
chips. The CP chip automatically recognizes the presence or absence
of the ENC chip and functions accordingly.
The CP, I/O, and ENC chip (if used) form a complete chipset and
function together as one integrated motion processor. The major
components connected to the chipset are the step & direction
compatible amplifier (4, 2, or 1 axes), the optional encoder feedback
channels (4, 2, or 1 axes), and the host processor.
The chipset's pulse and direction output signals are connected to the
motor amplifier. Using this scheme the direction bit indicates whether
the motor should move in the positive or negative direction, and the
pulse signal indicates the desired motor speed. Pulse and direction
output is compatible with a wide variety of full, half, and microstepping
amplifiers.
Using the -E chipset parts it is possible to input quadrature encoder
feedback to the chipset. The encoder signals consist of the A and B
quadrature signals from the encoder.
The host processor is interfaced via an 8-bit bi-directional bus and
various control signals. Host communication is coordinated by a
ready/busy signal, which indicates when communication is allowed.
Interconnections between the I/O and the CP chip consist of a data bus
(8 bits) and various control and synchronization signals.
Interconnections between the CP and the ENC chip (if used) also
consist of a data bus (10 bits) and various control and synchronization
signals. Many of these signals are common between the I/O, CP, and
the ENC chips although there are no direct connections between just
the ENC and the I/O chip. The following table summarizes the signals
that must be interconnected for the chipset to function properly. For
each listed signal the I/O chip pin on the left side of the table is
connected to the CP chip pin in the middle which is connected to the
ENC chip pin on the right side.
I/O Chip I/O CP Chip CP ENC Chip ENC
Signal
Name
Chip Signal Chip Signal Chip
Pin Name
Pin Name
Pin
-
-
Data2
58
CPData2 22
-
-
Data3
57
CPData3 19
CPData4 18
Data4
50
CPData4 9
CPData5 5
Data5
49
CPData5 31
CPData6 6
Data6
46
CPData6 41
CPData7 7
Data7
43
CPData7 42
CPData8 8
Data8
40
CPData8 44
CPData9 17
Data8
39
CPData9 1
CPData10 3
Data10
36
CPData10 12
CPData11 1
Data11
35
CPData11 2
CPAddr0 68
I/OAddr0 28
CPAddr0 24
CPAddr1 27
I/OAddr1 9
-
-
CPAddr2 29
I/OAddr2 6
CPAddr2 20
CPAddr3 12
I/OAddr3 5
CPAddr3 23
CPCntr0
20
I/OCntr0 16
CPCntr0 15
CPCntr1
36
I/OCntr1 18
-
-
CPCntr2
22
I/OCntr2 68
-
-
CPCntr3
63
I/OCntr3 67
-
-
CPWrite
2
I/OWrite 15 CPWrite 13
CPClk
46
ClkOut 19
CPClk
7
CPReset 43
Reset
17
-
-
For a complete description of all pins see the 'Pin Descriptions'
section of this manual.
Unless specifically noted otherwise, the term 'MC1451' or
'MC1451A' refers to the MC1451A, MC1251A, MC1151A, MC1451A-
E, MC1251A-E, and MC1151A-E Motion Processors.
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