MBM29F040C Ver la hoja de datos (PDF) - Spansion Inc.
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MBM29F040C Datasheet PDF : 41 Pages
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MBM29F040C-55/-70/-90
Write Operation Status
Table 6 Hardware Sequence Flags
Status
DQ7
DQ6
Embedded Program Algorithm
DQ7 Toggle
Embedded Erase Algorithm
0 Toggle
In Progress
Erase
Suspended
Mode
Erase Suspend Read
(Erase Suspended Sector)
Erase Suspend Read
(Non-Erase Suspended Sector)
Erase Suspend Program
Non-Erase Suspended Sector)
1
1
Data Data
DQ7
Toggle
(Note 1)
Embedded Program Algorithm
DQ7 Toggle
Exceeded Program/Erase in Embedded Erase Algorithm
Time Limits
Erase
Suspended
Mode
Erase Suspend Program
(Non-Erase Suspended Sector)
0 Toggle
DQ7 Toggle
DQ5
0
0
0
Data
0
1
1
1
DQ3
DQ2
0
1
1 Toggle
0 Toggle
Data Data
0
1
(Note 2)
0
1
1
N/A
0
N/A
Notes: 1. Performing successive read operations from any address will cause DQ6 to toggle.
2. Reading the byte address being programmed while in the erase-suspend program mode will indicate logic
“1†at the DQ2 bit. However, successive reads from the erase-suspended sector will cause DQ2 to toggle.
3. DQ0 and DQ1 are reserve pins for future use. DQ4 is for Fujitsu internal use only.
DQ7
Data Polling
The MBM29F040C device features Data Polling as a method to indicate to the host that the Embedded Algorithms
are in progress or completed. During the Embedded Program Algorithm an attempt to read the device will produce
the compliment of the data last written to DQ7. Upon completion of the Embedded Program Algorithm, an attempt
to read the device will produce the true data last written to DQ7. During the Embedded Erase Algorithm, an
attempt to read the device will produce a “0†at the DQ7 output. Upon completion of the Embedded Erase Algorithm
an attempt to read the device will produce a “1†at the DQ7 output. The flowchart for Data Polling (DQ7) is shown
in Figure 15.
For chip erase, and sector erase the Data Polling is valid after the rising edge of the sixth WE pulse in the six
write pulse sequence. For sector erase, the Data Polling is valid after the last rising edge of the sector erase
WE pulse. Data Polling must be performed at sector address within any of the sectors being erased and not a
protected sector. Otherwise, the status may not be valid. Once the Embedded Algorithm operation is close to
being completed, the MBM29F040C data pins (DQ7) may change asynchronously while the output enable (OE)
is asserted low. This means that the device is driving status information on DQ7 at one instant of time and then
that byte’s valid data at the next instant of time. Depending on when the system samples the DQ7 output, it may
read the status or valid data. Even if the device has completed the Embedded Algorithm operation and DQ7 has
a valid data, the data outputs on DQ0 to DQ6 may be still invalid. The valid data on DQ0 to DQ7 will be read on
the successive read attempts.
The Data Polling feature is only active during the Embedded Programming Algorithm, Embedded Erase
Algorithm, or sector erase time-out. (See Table 6.)
See Figure 9 for the Data Polling timing specifications and diagrams.
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