MAX8720 Ver la hoja de datos (PDF) - Maxim Integrated

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MAX8720

Dynamically Adjustable 6-Bit VID Step-Down Controller

Maxim Integrated 

Dynamically Adjustable 6-Bit VID

Step-Down Controller

ELECTRICAL CHARACTERISTICS (continued)

(Circuit of Figure 1, V+ =15V, SHDN = SKIP = VDD = VCC = +5V, VOUT = 1.25V, TA = -40°C to +85°C, unless otherwise noted.

Typical values are at TA = +25°C.) (Note 4)

PARAMETER

SYMBOL

CONDITIONS

MIN TYP MAX UNITS

Output Overvoltage Trip

Threshold

2.20

2.30

V

Output Undervoltage-Protection

Trip Threshold

With respect to unloaded output voltage

65

75

%

PGOOD Lower Trip Threshold

Measured at FB with respect to unloaded

output voltage, hysteresis = 1%

-17.5

-12.5

%

PGOOD Upper Trip Threshold

CURRENT LIMIT

ILIM Adjustment Range

Current-Limit Threshold (Fixed)

Current-Limit Threshold

(Adjustable)

Current-Limit Threshold

(Negative)

GATE DRIVERS

DH Gate-Driver On-Resistance

(Note 3)

DL Gate-Driver On-Resistance

(Note 3)

INPUTS AND OUTPUTS

SHDN Input Level

Logic Input High Voltage

Logic Input Low Voltage

Four-Level Input Logic

Measured at FB with respect to unloaded

output voltage, hysteresis = 1%

+12.5

VLIMIT

VLIMIT

VNEG

VPGND - VLX, ILIM = VCC

VPGND - VLX

VILIM = 2.00V

VILIM = 0.50V

VLX - VPGND, SKIP = ILIM = VCC

0.5

80

160

33

-140

QSOP package

RDH BST-LX forced to 5V

TQFN package

DL, high state

RDL

QSOP package

TQFN package

DL, low state

VSHDN

VIH

VIL

Logic high

Logic low

No-fault mode

D0–D5, SKIP, SUS

D0–D5, SKIP, SUS

TON, S0, S1

High

Open

REF

GND

2.4

12

2.4

VCC -

0.2

3.15

1.65

+17.5

%

VREF

V

115

mV

240

mV

65

-85

mV

3.5

Ω

4.5

3.5

4.0

Ω

1.0

0.4

V

15

V

0.8

V

3.85

V

2.35

0.5

Note 2: On-time specifications are measured from 50% to 50% at the DH pin, with LX forced to 0, BST forced to 5V, and a 500pF

capacitor from DH to LX to simulate external MOSFET gate capacitance. Actual in-circuit times may be different due to

MOSFET switching speeds.

Note 3: Production testing limitations due to package handling require relaxed maximum on-resistance specifications for the thin

QFN package. The QSOP and thin QFN package contain the same die, and the thin QFN package imposes no additional

resistance in the circuit.

Note 4: Specifications to -40°C are guaranteed by design, not production tested.

6 _______________________________________________________________________________________

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