DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

M34282M2-XXXGP Ver la hoja de datos (PDF) - Renesas Electronics

Número de pieza
componentes Descripción
Fabricante
M34282M2-XXXGP
Renesas
Renesas Electronics Renesas
M34282M2-XXXGP Datasheet PDF : 69 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
4282 Group
Table 4 Control registers related to timer
Timer control register V1
at reset : 0002
at RAM back-up : 0002
W
V12 Carrier wave output auto-control bit
V11 Timer 1 count source selection bit
V10 Timer 1 control bit
0 Auto-control output by timer 1 is invalid
1 Auto-control output by timer 1 is valid
0 Carrier wave output (CARRY)
1 Bit 5 of watchdog timer (WDT)
0 Stop (Timer 1 state retained)
1 Operating
Timer control register V2
at reset : 00002
at RAM back-up : 00002
W
V23 Carrier wave “H” interval expansion bit
0 To expand “H” interval is invalid
1 To expand “H” interval is valid (when V22=1 selected)
0 Carrier wave generation function invalid
V22 Carrier wave generation function control bit
1 Carrier wave generation function valid
V21 Timer 2 count source selection bit
0 f(XIN)
1 f(XIN)/2
V20 Timer 2 control bit
0 Stop (Timer 2 state retained)
1 Operating
Note: “W” represents write enabled.
(1) Control registers related to timer
• Timer control register V1
Register V1 controls the timer 1 count source and auto-
control function of carrier wave output from port CARR by
timer 1. Set the contents of this register through register A
with the TV1A instruction.
• Timer control register V2
Register V2 controls the timer 2 count source and the carrier
wave generation function by timer. Set the contents of this
register through register A with the TV2A instruction.
(2) Precautions
Note the following for the use of timers.
• Count source
Stop timer 1 or timer 2 counting to change its count source.
• Watchdog timer
Be sure that the timing to execute the WRST instruction in
order to operate WDT efficiently.
• Writing to reload register R1
When writing data to reload register R1 while timer 1 is
operating, avoid a timing when timer 1 underflows.
• Timer 1 count operation
When the bit 5 of the watchdog timer (WDT) is selected as
the timer 1 count source, the error of maximum ± 256 µs
(at the minimum instruction execution time : 8 µs) is
generated from timer 1 start until timer 1 underflow. When
programming, be careful about this error.
• Stop of timer 2
Avoid a timing when timer 2 underflows to stop timer 2.
• Writing to reload register R2H
When writing data to reload register R2H while timer 2 is
operating, avoid a timing when timer underflows.
• Timer 2 carrier wave output function
When to expand “H” interval of carrier wave is valid, set “1”
or more to reload register R2H.
Rev.1.33 Mar 18, 2004 page 12 of 67

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]