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GMS30C2216

16/32 BIT RISC/DSP

Hynix Semiconductor 

0-6

CHAPTER 0

• DSP Add and Subtract instructions:

signed halfword add and subtract with and without fixed-point adjustment ⇒ single

word sum and difference

• Floating-point instructions are architecturally fully integrated, they are executed as

Software instructions by the present version. Floating-point Add, Subtract, Multiply,

Divide, Compare and Compare unordered for single and double-precision, and Convert

single ⇔ double are provided.

Exceptions:

• Pointer, Privilege, Frame and Range Error, Extended Overflow, Parity Error, Interrupt

and Trace mode exception

• Watchdog function

• Error-causing instructions can be identified by backtracking, thus allowing a very

detailed error analysis

Timer:

• Two multifunctional timers

Bus Interface:

• Separate address bus of 26 (GMS30C2232) or 22 (GMS30C2216) bits and data bus of

up to 32 (GMS30C2232) or 16 bits (GMS30C2216) provide a throughput of four or

two bytes at each clock cycle

• Data bus width of 32, 16 or 8 bits, individually selectable for each external memory area.

• 8-bit, 16-bit, and 32-bit boot width selectable via two external pins.

• 5V tolerant input

• Configurable I/O pins

• Internal generation of all memory and I/O control signals

• Wait pin function for I/O accesses to peripheral devices.

• Wait pin function for memory accesses to address space MEM2.

• On-chip DRAM controller supporting Fast-Page-Mode DRAMs and EDO DRAMs.

• Up to seven vectored interrupts

• Control function for CLKOUT pin.

Power Management:

• Operating voltage : 3.3V ± 0.3V.

• Lower power supply current in power-down mode.

• Clock-Off function to further reduce power dissipation (Sleep Mode)

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