GMS30C2116 Ver la hoja de datos (PDF) - Hynix Semiconductor

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Fabricante

GMS30C2116

16/32 BIT RISC/DSP

Hynix Semiconductor 

Overview

0-9

0.3. Pin Configuration (continued)

0.3.3 Pin Function

Type

Name State

Use

Power

VCC

I Power. Connected to the power supply. It can be

selected 5.0V or 3.3V power supply.

GND

I Ground. Connected to the system ground. All GND

pins must be connected to the system ground.

Clock

XTAL1

I Input for Quartz Clock. When external clock

generator generates the clock, XTAL1 is used as

clock input.

XTAL2

O Output for Quartz Clock.

CLKOUT

O Clock Signal Output. It can be used to supply a

clock signal to peripheral devices.

Address Bus A25..A0

O/Z Address Bus. With the GMS30C2132, only A22..A0

are connected to the address bus pins

Data Bus D31..D0 I/O Data Bus. 32-bit bi-directional data bus

DP0..DP3 I/O Data Parity Signal. Bi-directional parity signals

Bus Control RAS#

O/Z Row Address Strobe. RAS# is activated when the

processor accesses a DRAM or refresh cycle. When

a SRAM is placed in MEM0, RAS# is used as the

chip select signal

CAS0#..CAS O/Z Column Address Strobe. They are only used by a

3#

DRAM for column access cycles and for “CAS

before RAS” refresh.

WE#

O/Z Write Enable. Active low indicates a write access,

active high indicates a read access.

CS1#..CS3# O/Z Chip Select. Active low of CS1#..CS3# indicates

chip select for the memory areas MEM1..MEM3.

WE0#..WE3# O/Z SRAM Write Enable. Active low indicates write

enable for the corresponding byte.

OE#

O/Z Output Enable for SRAM’s and EPROM’s.

IORD#

O/Z I/O Read Strobe, optionally I/O Data Strobe. The

use of IORD# is specified in the I/O address bit 10.

IOWR# O/Z I/O Write Strobe.

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