GM5060 Ver la hoja de datos (PDF) - Unspecified

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GM5060

GRAPHICS PROCESSING IC PROVIDING HIGH QUALITY IMAGES FOR LCD MONITORS

Unspecified 

Genesis Microchip

gm5060 / gm5060-H Data Sheet

3. PIN LIST

I/O Legend:

I = Input O = Output P = Power G= Ground

Name

REXT

RED+

RED-

GREEN+

GREEN-

BLUE+

BLUE-

HSYNC

VSYNC

Name

REXT

RX2+

RX2-

RX1+

RX1-

RX0+

RX0-

RXC+

RXC-

DDC_SCL

DDC_SDA

I/O

I

I

I

I

I

I

I

I

I

Ball#

B10

E1

E2

D2

D1

C1

C2

L2

K1

Table 1. ADC Signals

Description

External termination resistor. A 1% 1K ohm resistor must be connected from this pin to AVDD_3.3

(3.3V analog power supply). This termination resistor determines current references for both the DVI

receiver block and Analog HSYNC Delay block for both DVI and analog configurations.

Positive analog input for Red channel.

Negative analog input for Red channel.

Positive analog input for Green channel.

Negative analog input for Green channel.

Positive analog input for Blue channel.

Negative analog input for Blue channel.

ADC input horizontal sync or composite sync input.

[Input, schmitt trigger (400mV typical hysteresis), 5V-tolerant]

ADC input vertical sync.

[Input, schmitt trigger (400mV typical hysteresis), 5V-tolerant]

Table 2. DVI Receiver Signals

I/O Ball# Description

I

B10

I

C10

I

D10

I

C9

I

D9

I

C8

I

D8

I

C6

I

D6

I

N2

IO N3

External termination resistor. A 1% 1K ohm resistor must be connected from this pin to AVDD_3.3

(3.3V analog power supply). This termination resistor determines current references for both the DVI

receiver block and Analog HSYNC Delay block for both DVI and analog configurations.

DVI input channel 2 positive component; RED data and embedded CTL3

DVI input channel 2 negative component; RED data and embedded CTL3

DVI input channel 1 positive component; GREEN data

DVI input channel 1 negative component; GREEN data

DVI input channel 0 positive component; BLUE data

DVI input channel 0 negative component; BLUE data

DVI input clock positive component

DVI input clock negative component

For the gm5060-H (HDCP-enabled), this pin is used for DDC Interface for DVI-HDCP

communication. This is SCL for slave-only DDC communication.

[Input, Schmitt trigger (400mV typical hysteresis), 5V-tolerant]

For the gm5060 (non-HDCP), this pin is an unused CMOS input that may be left unconnected.

However, it is preferred that this pin be connected to a known logic state.

For the gm5060-H (HDCP-enabled), this pin is used for DDC Interface for DVI-HDCP

communication. This is SDA for slave-only DDC communication.

[Bidirectional, 4mA drive output, Schmitt trigger input (400mV typical hysteresis), 5V-tolerant]

For the gm5060 (non-HDCP), this pin is an unused CMOS input that may be left unconnected.

However, it is preferred that this pin be connected to a known logic state.

February 2002

6

C5060-DAT-01G

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