HFBR-5104 Ver la hoja de datos (PDF) - HP => Agilent Technologies

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Fabricante

HFBR-5104

FDDI, 100 Mbps ATM, and Fast Ethernet Transceivers in Low Cost 1x9 Package Style

HP => Agilent Technologies 

HFBR-5105/-5105T

Receiver Optical and Electrical Characteristics

(TA = 0°C to 70°C, VCC = 4.75 V to 5.25 V)

Parameter

Symbol

Min. Typ.

Input Optical Power

Minimum at Window Edge

PIN Min. (W)

Input Optical Power

Minimum at Eye Center

PIN Min. (C)

Input Optical Power Maximum

Operating Wavelength

PIN Max.

λ

-14

1270

Duty Cycle Distortion

DCD

0.02

Contributed by the Receiver

Data Dependent Jitter

DDJ

0.35

Contributed by the Receiver

Random Jitter Contributed

RJ

1.0

by the Receiver

Signal Detect - Asserted

PA

PD + 1.5 dB

Signal Detect - Deasserted

PD

-45

Signal Detect - Hysteresis

Signal Detect Assert Time

(off to on)

PA - PD

AS_Max

1.5

2.4

0

55

Signqal Detect Deassert Time ANS_MAX

0

110

(on to off)

Max.

-29

-29.8

1380

0.4

1.0

2.9

-31

100

350

Unit

dBm avg.

dBm avg.

dBm avg.

nm

ns p-p

Reference

Note 20a

Figure 11

Note 21a

Figure 11

Note 20a

Note 8

ns p-p

Note 9

ns p-p

Note 10

dBm avg.

dBm avg.

dB

µs

µs

Note 22,

23a

Note 24,

25a

Note 22,

25a

Note 24,

25a

Notes:

1. This is the maximum voltage that

can be applied across the Differen-

tial Transmitter Data Inputs to

prevent damage to the input ESD

protection circuit.

2. The outputs are terminated with

50 Ω connected to VCC -2 V.

3. The power supply current needed to

operate the transmitter is provided

to differential ECL circuitry. This

circuitry maintains a nearly con-

stant current flow from the power

supply. Constant current operation

helps to prevent unwanted electrical

noise from being generated and

conducted or emitted to neighboring

circuitry.

4. This value is measured with the out-

puts terminated into 50 Ω connected

to VCC - 2 V and an Input Optical

Power level of -14 dBm average.

5. The power dissipation value is the

power dissipated in the receiver

itself. Power dissipation is calcu-

lated as the sum of the products of

supply voltage and currents, minus

the sum of the products of the

output voltages and currents.

6. This value are measured with

respect to VCC with the output

terminated into 50 Ω connected to

VCC - 2 V.

7. The output rise and fall times are

measured between 20% and 80%

levels with the output connected to

VCC -2 V through 50 Ω.

8. Duty Cycle Distortion contributed

by the receiver is measured at the

50% threshold using an IDLE Line

State, 125 MBd (62.5 MHz square-

wave), input signal. The input

optical power level is -20 dBm

average. See Application

Information - Transmitter Jitter

Section for further information.

9. Data Dependent Jitter contributed by

the receiver is specified with the

FDDI DDJ test pattern described in

the FDDI PMD Annex A.5. The

input optical power level is -20 dBm

average. See Application Informa-

tion - Transmitter Jitter Section for

further information.

10. Random Jitter contributed by the

receiver is specified with an IDLE

Line State, 125 MBd (62.5 MHz

square-wave), input signal. The

input optical power level is at maxi-

mum “PIN Min. (W)”. See Application

Information - Transmitter Jitter

Section for further information.

145

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