CM3107 Ver la hoja de datos (PDF) - California Micro Devices Corp

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CM3107

2 Amp Source/ Sink Bus Termination Regulator for DDR Memory and Front Side Bus Applications

California Micro Devices Corp 

CM3107

PACKAGE / PINOUT DIAGRAM

TOP VIEW

TOP VIEW

VDDQ

VTT

GND

VSENSE

1

8

2

7

3

6

4

5

VCC

VDDQSEL

VREF

FSBSEL

8-lead SOIC

Note: This drawing is not to scale.

VDDQ

VTT

GND

VSENSE

1

8

2

7

GND

3

6

4

5

VCC

VDDQSEL

VREF

FSBSEL

8-lead PSOP

PIN DESCRIPTIONS

SOIC-8

LEAD(S)

NAME DESCRIPTION

1

VDDQ

VDDQ

2

VTT

Outputs either 1.225V/1.45V FSB or VDDQ/2 DDR (See note 1)

3

GND Ground

4

VSENSE Feedback voltage input

5

FSBSEL Selects FSB output for either VTT=1.225V or 1.45V

6

VREF 1.25V reference voltage input for DDR bus

7

VDDQSEL Select output to support FSB or DDR applications

8

VCC

Power for internal control circuits

Note 1: Assumes VDDQ and VDDQSEL are tied together in DDR application.

Ordering Information

PART NUMBERING INFORMATION

Pins

8

8

Package

PSOP-8

SOIC-8

Standard Finish

Ordering Part

Number1

Part Marking

CM3107-00SB

CM3107-00SB

CM3107-00SN

CM310701S

Lead-free Finish

Ordering Part

Number1

Part Marking

CM3107-12SH

CM3107-00SH

CM3107-00SM

CM3107-00SM

Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.

© 2004 California Micro Devices Corp. All rights reserved.

2 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 L Tel: 408.263.3214

L Fax: 408.263.7846 L www.calmicro.com

02/02/04

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