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ADE7755ARSRL Ver la hoja de datos (PDF) - Analog Devices

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ADE7755ARSRL
ADI
Analog Devices ADI
ADE7755ARSRL Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
ADE7755
PRELIMINARY TECHNICAL DATA
Interfacing the ADE7755 to a Microcontroller for Energy
Measurement
The easiest way to interface the ADE7755 to a microcontroller
is to use the CF high-frequency output with the output frequency
scaling set to 2048 × F1, F2. This is done by setting SCF = 0
and S0 = S1 = 1 (see Table IV). With full-scale ac signals on the
analog inputs, the output frequency on CF will be approximately
5.5 kHz. Figure 13 illustrates one scheme that could be used to
digitize the output frequency and carry out the necessary
averaging mentioned in the previous section.
Power Measurement Considerations
Calculating and displaying power information will always have
some associated ripple that will depend on the integration period
used in the MCU to determine average power and also the load.
For example, at light loads, the output frequency may be 10 Hz.
With an integration period of two seconds, only about 20 pulses
will be counted. The possibility of missing one pulse always exists,
since the ADE7755 output frequency is running asynchronously
to the MCU timer. This would result in a one-in-twenty (or
5%) error in the power measurement.
CF
AVERAGE
FREQUENCY
FREQUENCY
RIPPLE
؎10%
ADE7755
CF
REVP*
TIME
MCU
COUNTER
UP/ DOWN
TIMER
*REVP MUST BE USED IF THE METER IS BIDIRECTIONAL OR
DIRECTION OF ENERGY FLOW IS NEEDED
Figure 13. Interfacing the ADE7755 to an MCU
As shown, the frequency output CF is connected to an MCU
counter or port. This will count the number of pulses in a given
integration time that is determined by an MCU internal timer.
The average power proportional to the average frequency is
given by:
Average Frequency = Average Real Power = Counter
Timer
The energy consumed during an integration period is given by:
Energy = Average Power × Time = Counter × Time = Counter
Time
For the purpose of calibration, this integration time can be 10 to
20 seconds to accumulate enough pulses to ensure correct aver-
aging of the frequency. In normal operation, the integration time
can be reduced to one or two seconds depending, for example,
on the required undate rate of a display. With shorter integra-
tion times on the MCU, the amount of energy in each update
may still have some small amount of ripple, even under steady
load conditions. However, over a minute or more, the measured
energy will have no ripple.
TRANSFER FUNCTION
Frequency Outputs F1 and F2
The ADE7755 calculates the product of two voltage signals (on
Channel 1 and Channel 2) and then low-pass filters this product
to extract real power information. This real power information
is then converted to a frequency. The frequency information is
output on F1 and F2 in the form of active low pulses. The pulse
rate at these outputs is relatively low, e.g., 0.34 Hz maximum
for ac signals with S0 = S1 = 0 (see Table III). This means that
the frequency at these outputs is generated from real power
information accumulated over a relatively long period of time.
The result is an output frequency that is proportional to the
average real power. The averaging of the real power signal is
implicit to the digital-to-frequency conversion. The output
frequency or pulse rate is related to the input voltage signals by
the following equation.
Freq = 8.06 × V1 × V 2 × Gain × F14
VREF 2
where:
Freq = Output frequency on F1 and F2 (Hz)
V1 = Differential rms voltage signal on Channel 1 (Volts)
V2 = Differential rms voltage signal on Channel 2 (Volts)
Gain = 1, 2, 8, or 16, depending on the PGA gain selection
made using logic inputs G0 and G1
VREF = The reference voltage (2.5 V ± 8%) (Volts)
F1–4 = One of four possible frequencies selected by using the
logic inputs S0 and S1—see Table II
Table II. F1–4 Frequency Selection
S1
S0
0
0
0
1
1
0
1
1
F1–4 (Hz)
1.7
3.4
6.8
13.6
XTAL/CLKIN*
3.579 MHz/221
3.579 MHz/220
3.579 MHz/219
3.579 MHz/218
NOTE
*F1–4 is a binary fraction of the master clock and therefore will vary if the speci-
fied CLKIN frequency is altered.
–14–
REV. PrA

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