AAT1154 Ver la hoja de datos (PDF) - Analog Technology Inc
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AAT1154 Datasheet PDF : 16 Pages
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SwitchRegTM
PRODUCT DATASHEET
AAT1154
1MHz 3A Step-Down DC/DC Converter
Figure 2: AAT1154 Fixed Output
Top Side Layout.
Layout
Figures 2 and 3 display the suggested PCB layout for the
fixed output AAT1154. The following guidelines should be
used to help ensure a proper layout.
1. The connection from the input capacitor to the
Schottky anode should be as short as possible.
2. The input capacitor should connect as closely as pos-
sible to VP (Pins 5 and 8) and GND (Pin 2).
3. C1, L1, and CR1 should be connected as closely as
possible. The connection from the cathode of the
Schottky to the LX node should be as short as pos-
sible.
4. The feedback trace (Pin 1) should be separate from
any power trace and connect as closely as possible
to the load point. Sensing along a high-current load
trace can degrade DC load regulation.
5. The resistance of the trace from the load return to
GND (Pin 2) should be kept to a minimum. This will
help to minimize any error in DC regulation due to
differences in the potential of the internal reference
ground and the load return.
6. R1 and C3 are required in order to provide a cleaner
power source for the AAT1154 control circuitry.
Thermal
The losses associated with the AAT1154 output switching
MOSFET are due to switching losses and conduction
losses. The conduction losses are associated with the
RDS(ON) characteristics of the output switching device. At
the full load condition, assuming continuous conduction
mode (CCM), an accurate calculation of the RDS(ON) losses
can be derived from the following equations:
Figure 3: AAT1154 Fixed Output
Bottom Side Layout.
RDS(ON) losses
PON =
I2
RMS
· RDS(ON)
IRMS =
⎛
⎝
I
2
O
+
ΔI 2
12
⎞
⎠
·D
Internal switch RMS current
D is the duty cycle and VF is the forward drop of the
Schottky diode.
D = VO + VF
VIN+ VF
ΔI is the peak-to-peak inductor ripple current.
A simplified form of calculating the RDS(ON) and switching
losses is given by:
ΔI = VO ·(1-D )
L·F
where IQ is the AAT1154 quiescent current.
Once the total losses have been determined, the junction
temperature can be derived. The thermal resistance
(ΘJA) for the SOP-8 package mounted on an FR4 printed
circuit board in still air is 110°C/W.
TJ = P · ΘJA + TAMB
TAMB is the maximum ambient temperature and TJ is the
resultant maximum junction temperature.
12
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1154.2007.11.1.7
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