A88
1. In CVBS signal format, to generate the internal timing, as part, Vertical blank/Horizontal blank/ Burst
gate/Serration & Equalization and the actual Active video output interval are generated.
2. Timing diagram is shown below.
Y proc block
1. Y mux block
i.Timing generation block generates signals (Sync, Blank, Serration, Equalization, Video Active),
according to output data selection and video output section, Y (luminance) is amplified by
ENC_GAINY times and Pedestal level is added which is the final luminance output.
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