A25L20P Ver la hoja de datos (PDF) - AMIC Technology

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A25L20P

2Mbit / 1Mbit / 512Kbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface

AMIC Technology 

Fast Read Dual Input-Output (BBh)

The Fast Read Dual Input-Output (BBh) instruction is similar

to the Fast_Read (0Bh) instruction except the data is input

and output on two pins, DO and DIO, instead of just DO. This

allows data to be transferred from the

A25L20P/A25L10P/A25L05P at twice the rate of standard

SPI devices.

Similar to the Fast Read instruction, the Fast Read Dual

Output instruction can operate at the highest possible

A25L20P/A25L10P/A25L05P Series

frequency of fC (See AC Characteristics). This is

accomplished by adding four “dummy” clocks after the 24-bit

address as shown in figure 11. The dummy clocks allow the

device’s internal circuits additional time for setting up the

initial address. The input data during the dummy clocks is

“don’t care”. However, the DIO and DO pins should be

high-impedance prior to the falling edge of the first data out

clock.

Figure 11. FAST_READ_DUAL_INPUT-OUTPUT Instruction Sequence and Data-Out Sequence

S

0 1 2 3 4 5 6 7 8 9 10 16 17 18 19

C

Instruction

24-Bit Address

DIO

High Impedance

DO

22 20 18

MSB

23 21 19

6420

7531

S

20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35

C

Dummy

Byte

DIO switches from input to output

DIO

3210 64206420642 06420642 0

DO

7531 75317531753175317

MSB

Data Out 1

MSB

Data Out 2

Data Out 3

MSB

Data Out 4

Data Out 5

MSB

Note: Address bits A23 to A18 are Don’t Care, for A25L20P.

Address bits A23 to A17 are Don’t Care, for A25L10P.

Address bits A23 to A16 are Don’t Care, for A25L05P

(August, 2007, Version 1.0)

19

AMIC Technology Corp.

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