VSC7130(2000) Ver la hoja de datos (PDF) - Vitesse Semiconductor

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componentes Descripción

Fabricante

VSC7130
(Rev.:2000)

Dual Repeater/Retimer for Fibre Channel and Gigabit Ethernet

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

Dual Repeater/Retimer

for Fibre Channel and Gigabit Ethernet

Advance Product Information

VSC7130

Package Pin Descriptions

Figure 7: Pin Diagram

Top View

TWO

A4

A3

A2

A1

A0

VSS

VDDP

REFO+

REFO-

VDDP

VDD

SDET

TEST2

VSSA

CAP0

63

61

59

57

55

53

51

49

1

47

3

45

5

43

7

41

9

39

11

37

13

35

15

33

17

19

21

23

25

27

29

31

R1/0

VDD

RXBIAS

VSS

TWI

SDA

SCL

VDD

REFI+

REFI-

VDD

TEST0

HALF/FULL

MODE0

MODE1

TEST1

NOTE: Exposed pad on bottom must be connected to ground.

Table 7: Pin Identification

Pin #

61, 60

50, 51

48

26, 27

57, 56

22, 23

31

40

39

Name

RX0+, RX0-

RX1+, RX1-

R1/0

SI+, SI-

TX+, TX-

SO+, SO-

TXDIS

REFI+

REFI-

Description

INPUT - Differential. Serial input to MUX2/MUX1 from the external media.

INPUT - Differential. Serial input to MUX2/MUX1 from the external media.

INPUT - TTL. Selects RX1+/- when HIGH, RX0+/- when LOW.

INPUT - Differential. Serial input to MUX1/MUX3 from the internal system.

OUTPUT - Differential. Serial output from Repeater0 to the external media.

OUTPUT - Differential. Serial output from Repeater1 to the internal system.

INPUT - TTL. When HIGH, TX+=HIGH, TX-=LOW. When LOW, TX+/- is enabled.

Can be overridden by TXDDIS.

INPUT - TTL or PECL. REFerence CLocK at 1/10th or 1/20th the baud rate as

determined by HALF/FULL. Used for the clock multiplier unit. If TTL, leave REFI-

open. If PECL, connect both REFI+ and REFI-.

Page 16

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

G52297-0, Rev. 2.3

1/17/00

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