CY7C68053-56BAXI Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY7C68053-56BAXI Datasheet PDF : 42 Pages
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CY7C68053
MoBL-USB™ FX2LP18 USB
Microcontroller
1. Features
■ USB 2.0 9 V USB-IF high speed and full speed compliant (TID#
40000188)
■ Single-chip integrated USB 2.0 transceiver, smart SIE, and
enhanced 8051 microprocessor
■ Ideal for mobile applications (cell phone, smart phones, PDAs,
MP3 players)
❐ Ultra low power
❐ Suspend current: 20 µA (typical)
■ Software: 8051 Code runs from:
❐ Internal RAM, which is loaded from EEPROM
■ 16 kBytes of on-chip code/data RAM
■ Four programmable BULK/INTERRUPT/ISOCHRONOUS
endpoints
❐ Buffering options: double, triple, and quad
■ Additional Programmable (BULK/INTERRUPT) 64-Byte
Endpoint
■ 8 or 16-Bit External Data Interface
■ Smart Media Standard ECC Generation
■ GPIF (General Programmable Interface)
❐ Allows direct connection to most parallel interface
❐ Programmable waveform descriptors and configuration
registers to define waveforms
❐ Supports multiple Ready and Control outputs
■ Integrated, Industry Standard Enhanced 8051
❐ 48 MHz, 24 MHz, or 12 MHz CPU operation
❐ Four clocks per instruction cycle
❐ Three counter/timers
❐ Expanded interrupt system
❐ Two data pointers
■ 1.8 V Core Operation
■ 1.8 V to 3.3 V I/O Operation
■ Vectored USB Interrupts and GPIF/FIFO Interrupts
■ Separate Data Buffers for Setup and Data Portions of a
CONTROL Transfer
■ Integrated I2C Controller, runs at 100 or 400 kHz
■ Four Integrated FIFOs
❐ Integrated glue logic and FIFOs lower system cost
❐ Automatic conversion to and from 16-bit buses
❐ Master or slave operation
❐ Uses external clock or asynchronous strobes
❐ Easy interface to ASIC and DSP ICs
■ Available in Industrial Temperature Grade
■ Available in one Pb-free Package with up to 24 GPIOs
❐ 56-pin VFBGA (24 GPIOs)
Logic Block Diagram
24 MHz
Ext. XTAL
High-performance microprocessor
using standard tools
with lower-power options
MoBL-USB FX2LP18
VCC
x20
/0.5
/1.0
PLL /2.0
1.5K
Connected for
Full-Speed
D+
D–
Integrated
Full- and High-Speed
XCVR
USB
2.0
XCVR
CY
Smart
USB
1.1/2.0
Engine
8051 Core
12/24/48 MHz,
Four Clocks/Cycle
16 KB
RAM
I2C
Master
Additional IOs (24)
ECC
GPIF
RDY (2)
CTL (3)
4 KB
FIFO
8/16
Abundant IO
General
Programmable I/F
To Baseband Processors/
Application Processors/
ASICS/DSPs
Up to 96 MBytes/sec
Burst Rate
Enhanced USB Core
Simplifies 8051 Code
“Soft Configuration”
Easy Firmware Changes
FIFO and Endpoint Memory
(Master or Slave Operation)
Cypress Semiconductor Corporation • 198 Champion Court
Document # 001-06120 Rev *J
• San Jose, CA 95134-1709 • 408-943-2600
Revised October 28, 2010
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