HEF4518BP,652 Ver la hoja de datos (PDF) - NXP Semiconductors.
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HEF4518BP,652 Datasheet PDF : 14 Pages
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Nexperia
HEF4518B
Dual BCD counter
Table 7. Dynamic characteristics …continued
VSS = 0 V; Tamb = 25 C; for test circuit see Figure 6; unless otherwise specified.
Symbol Parameter
Conditions
VDD
Extrapolation formula Min Typ Max Unit
tW
pulse width
nCP0 input LOW;
minimum width;
see Figure 5
5V
10 V
15 V
60 30
30 15
20 10
- ns
- ns
- ns
nCP1 input HIGH;
minimum width;
see Figure 5
5V
10 V
15 V
60 30
30 15
20 10
- ns
- ns
- ns
nMR input HIGH;
minimum width;
see Figure 5
5V
10 V
15 V
30 15
20 10
16 8
- ns
- ns
- ns
trec
recovery time
nMR input; see Figure 5 5 V
10 V
50 25
30 15
- ns
- ns
15 V
20 10 - ns
tsu
set-up time
nCP0 to nCP1;
see Figure 5
5V
10 V
50 25
30 15
- ns
- ns
15 V
20 10 - ns
nCP1 to nCP0;
see Figure 5
5V
10 V
50 25
30 15
- ns
- ns
15 V
20 10 - ns
fmax
maximum
frequency
nCP0, nCP1;
see Figure 5
5V
10 V
8 16
15 30
- MHz
- MHz
15 V
20 40
- MHz
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
Table 8. Dynamic power dissipation PD
PD can be calculated from the formulas shown. VSS = 0 V; tr = tf 20 ns; Tamb = 25 C.
Symbol Parameter
VDD
Typical formula for PD (W)
Where:
PD
dynamic power 5 V
PD = 750 fi + (fo CL) VDD2
fi = input frequency in MHz;
dissipation
10 V
PD = 3300 fi + (fo CL) VDD2
fo = output frequency in MHz;
15 V
PD = 8000 fi + (fo CL) VDD2
CL = output load capacitance in pF;
VDD = supply voltage in V;
(fo CL) = sum of the outputs.
HEF4518B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 19 April 2016
© Nexperia B.V. 2017. All rights reserved
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