XE1202I027 Ver la hoja de datos (PDF) - Unspecified
Número de pieza
componentes Descripción
Fabricante
XE1202I027 Datasheet PDF : 26 Pages
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Data Sheet
XE1202
Name
Bits
ADParam_Regcond
3
ADParam_WBBcond
2
ADParam_Xsel
1
ADParam_Res2
0
Byte Address
00111
00111
00111
00111
Description
Regulation process of the bandwidth
of the base-band filter according to
the selected bandwidth:
0 -> regulation restarted each time
the bandwidth is changed
1 -> no regulation started when
bandwidth is changed
Boosting process of the base-band
filter according to the selected
bandwidth:
0 -> boosting restarted each time
the bandwidth is changed
1 -> no boosting started when
bandwidth is changed
Selection of the XOSC modes:
0 -> CL + C0 = 15 pF
1 -> CL + C0 = 11 pF, lower current
consumption mode
Reserved
5.2.5 Pattern register
In this register, users can store a reference pattern of 8, 16, 24, or 32 bits (see ADParam_Psize parameter). The
first byte of this pattern is always stored in the byte at address A[4:0] = 01000. If used, the 2nd byte is stored at
address A[4:0] = 01001, and so on. The MSB bit of the reference pattern is always the bit 7 of the address 01000
and the LSB bit is the bit 0 of the address 01000, 01001, 01010, or 01011 if the pattern length is 8, resp. 16, 24, or
32 bits. When compared to the demodulated bit stream, the last bit received is compared to the LSB bit in the
Pattern register. The “oldest” bit received (the first of the last 8, 16, 24, or 32 received bits, depending on
ADParam_Psize) is compared with the bit 7 of byte address 01000 (the MSB).
Name
Pattern
Bits
Byte Address
Description
7-0
01000
1st byte of the reference pattern
01001
2nd byte
01010
3rd byte
01011
4th byte
Example of pattern recognition with a 32-bit pattern
Byte Address
01000
Bit 7
Bit 0
10010011
101 10010011
Byte Address
01001
Bit 7
Bit 0
10101010
10101010
Byte Address
01010
Bit 7
Bit 0
10010011
10010011
Byte Address
01011
Bit 7
Bit 0
10101010
10101010
previous bits from
demodulator
last bit received
18
D0211-105
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