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M65676FP Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC

Número de pieza
componentes Descripción
Fabricante
M65676FP
Mitsubishi
MITSUBISHI ELECTRIC  Mitsubishi
M65676FP Datasheet PDF : 17 Pages
First Prev 11 12 13 14 15 16 17
PRELIMINARY
Notice:This is not a final specification.
Some parametric limits are subject to change.
MITSUBISHI ICs (TV)
M65675FP/M65676FP
DIGITAL NTSC/PAL ENCODER
DESCRIPTION OF PIN
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
Pin name
DVSS2
PXCLK
DVASEL
HD
VD
VD9
VD8
VD7
VD6
VD5
VD4
VD3
VD2
VD1
VD0
DVSS2
DVDD2
DVDD1
DVSS1
OSDCK
OSD0
OSD1
OSD2
Master/Slave
RESET
ACK
SDA
SCL
TEST
DVDD1
N.C.
N.C.
C
N.C.
CVBS
AVSS2
Y
AVDD2
Yin
N.C.
Cin
Type
Supply
O
I
I/O
I/O
I/O
Supply
Supply
Supply
Supply
O
I
I
I
O
I/O
I
I
Supply
O
O
Supply
O
Supply
I
I
Function
Digital ground for I/O.
Reference clock for pixel data input.
The clock frequency is 27.0MHz or 13.5MHz in CCIR656/8-bit CCIR601 or 16-bit CCIR601 input
mode, respectively.
I2C slave address setting.
"Low" is for the slave address of 40h.
"High" is for the slave address of 42h.
Horizontal sync signal.
It is an input or output in the slave or master mode, respectively.
Vertical sync signal.
It is an input or output in the slave or master mode, respectively.
Video data inputs.
The input video data are the luma (Y) data as defined in CCIR Rec 601 in 16-bit CCIR601 mode.
In the Y/U/V output mode, the output is 10-bit luma signal with a composite sync.
In 16-bit CCIR601 mode, an MSB and LSB is VD7 and VD0, and in the Y/U/V output mode, VD9 and
VD0, respectively.
Digital ground for I/O.
Digital positive supply for I/O.
Digital positive supply for internal logic.
Digital Ground for internal logic.
Reference clock for the external OSD microprocessor.
The frequency is 13.5MHz or 6.25MHz, alternated by I2C bus control.
Color Look-up table address input.
MSB and LSB is OSD2 and OSD0, respectively.
Synchronizing mode selection.
"Low" is for the slave mode.
"High" is for the master mode.
Asynchronous reset, active "LOW".
Acknowledge line (Open drain output).
Serial data line/Acknowledge line (Open drain output).
Serial clock line.
Test mode control.
It should be grounded during actual use.
Digital positive supply for internal logic.
No connection.
No connection.
The analog chroma output signal from 6-dB amplifier.
The output amplitude is 1.0VP-P (typ.), while the input one is 0.5VP-P.
No connection.
The analog composite video output signal from 6-dB amplifier.
The output amplitude is 1.24VP-P (typ.).
Analog ground for 6-dB amplifiers.
The analog luma output signal from 6-dB amplifier.
The output amplitude is 1.2VP-P (typ.), while the input one is 0.6VP-P.
Analog positive supply for 6-dB amplifiers.
The analog luma input from an external LPF.
This input has clamp circuit. The signal must input via capacitor.
No connection
The analog chroma input from an external LPF.
This input has bias circuit. The signal must input via capacitor.
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