CMX615 Ver la hoja de datos (PDF) - MX-COM Inc

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componentes Descripción

Fabricante

CMX615

Digital Line to POTS Interface

MX-COM Inc  

Digital Line to POTS Interface

CMX615

1.5.8 ‘C-BUS’ Registers

Write Only Registers

Addr.

$01

$D0

$D1

$D3

$D4

Register

RESET

SETUP

MODE

TX

DATA

TX

TONES

7

N/A

Uncommitted

Amplifier:

0 = Powersave

1 = Not

Powersave

SPM O/P:

0 = Disable

1 = Enable

D7

D7

6

N/A

Tx Powersave:

0 = Powersave

1 = Not

Powersave

Tone/FSK:

0 = Disable

1 = Enable

D6

Command Data Byte (Bits 7 - 0)

5

4

3

N/A

N/A

N/A

Reserved

set to 0

SPM:

0 = 12kHz

1 = 16kHz

Reserved

set to 0

Tone/FSK:

0 = Tone

1 = FSK

D5

Tx Level:

(msb)

D4

Tx Level:

D3

2

N/A

Reserved

set to 0

Tx Level:

(lsb)

D2

1

0

N/A

N/A

FSK mode:

0 = Sync

1 = Async

FSK

mode:

0 = V23

1 = Bell

202

Tone

Fields:

(msb)

Tone

Fields:

(lsb)

D1

D0

D6

D5

D4

D3

D2

D1

D0

Read Only Registers

Addr.

$DF

Register

STATUS

7

FSK Mode:

FSK Tx Data

Underflow

6

FSK Mode:

FSK Tx

Data Ready

Reply Data Byte (Bits 7 - 0)

5

4

3

2

Reserved Reserved

Reserved Reserved

set to 0

set to 0

set to 0

set to 0

1

Reserved

set to 0

0

Reserved

set to 0

Notes:

1. Accessing the RESET Register over the ‘C-BUS’ clears all of the bits in the SETUP, MODE,

TX DATA, TX TONES and STATUS registers. This will set the device into the Zero Power mode.

Note that this is a single-byte ‘C-BUS’ transaction consisting solely of the address byte value $01.

2. If any of bits 6 or 7 of the STATUS Register is ‘1’ then the IRQN output will be pulled low.

3. Reading the STATUS Register clears the IRQN output. Bits 6 and 7 of the STATUS Register are

cleared on writing to the TX DATA Register.

© 1999 Consumer Microcircuits Limited

13

D/615/4

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