UPD77110 Ver la hoja de datos (PDF) - NEC => Renesas Technology

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componentes Descripción

Fabricante

UPD77110

16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSORS

NEC => Renesas Technology 

µPD77110, 77111, 77112

7.2.2 Internal peripherals

The internal peripherals are mapped to the internal data memory space.

X/Y Memory Address

0x3800

0x3801

0x3802

0x3803

0x3804

0x3805

0x3806

0x3807

0x3808

0x3809 - 0x383F

Register Name

SDT1

SST1

SDT2

SST2

PDT

PCD

HDT

HST

DWTR

Reserved area

Function

First serial data register

First serial status register

Second serial data register

Second serial status register

Port data register

Port command register

Host data register

Host status register

Data memory wait cycle register

Caution Do not access this area.

Peripheral Name

SIO

IOP

HIO

WTR

−

Cautions

1. The register names listed in this table are not reserved words of the assembler or the C

language. Therefore, when using these names in assembler or C, the user must define

them.

2. The same register is accessed, as long as the address is the same, regardless of whether

the X memory space or Y memory space is accessed.

3. Even different registers cannot be accessed at the same time from both the X and Y memory

spaces.

8. MASK OPTION

The µPD77111 and 77112 have mask options that must be specified when an order for a ROM is placed. This

section explains these mask options. The mask options are specified in the Workbench (WB77016) development

tool. To order a mask ROM, output a mask ROM ordering file format (.msk file) using WB77016.

8.1 Clock Control Options

The following four clock related options must be specified.

• PLL multiple

• Output division ratio

• HALT division ratio

• Validity of CLKOUT pin

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Data Sheet U12801EJ4V0DS00

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