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UPD75212ACW Ver la hoja de datos (PDF) - NEC => Renesas Technology

Número de pieza
componentes Descripción
Fabricante
UPD75212ACW
NEC
NEC => Renesas Technology NEC
UPD75212ACW Datasheet PDF : 70 Pages
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µPD75212A
* 1. The following external circuit is recommended.
µPD75212A
VDD
VPRE
VLOAD
VSS
+5 V
RD9, 1EL
68 k
RD9, 1EL :Zener Diode (NEC)
Zener Voltage = 8.29 to 9.30 V
–30 V
2. Current to the on-chip pull-down resistor and power-on reset circuit (mask option) is not included.
3. When the processor clock control register (PCC) is set to 0011 and is operated in the high-speed mode.
4. When the PCC register is set to 0000 and is operated in the low-speed mode.
5. When the system clock control register (SCC) is set to 1001 and is operated with the subsystem clock with
main system clock oscillation stopped.
POWER-ON RESET CIRCUIT CHARACTERISTICS (MASK OPTION) (Ta = –40 to +85 °C)
PARAMETER
Power-on reset
operating voltage high
SYMBOL
VDDH
TEST CONDITIONS
MIN. TYP. MAX. UNIT
4.5
6.0
V
Power-on reset
operating voltage low
VDDL
Power supply voltage
rise time
tr
Power supply voltage
off time
Power-on reset circuit*2
current consumption
toff
IDDPR
VDD = 5 V ±10 %
VDD = 2.7 V
* 1. 217/fXX (31.3 ms at fXX = 4.19 MHz)
2. Current with on-chip power-on reset circuit or power-on flag.
0
0.2
V
10
*1
µs
1
s
10
100
µA
2
20
µA
VDD
VDDH
VDDL
Remarks Start the power supply smoothly.
52
toff
tr

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