UPD75048CW Ver la hoja de datos (PDF) - NEC => Renesas Technology
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UPD75048CW Datasheet PDF : 68 Pages
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µPD75048
(3) Symbols in addressing area field
*1
MB = MBE . MBS
(MBS = 0, 1, 15)
*2
MB = 0
*3
MBE = 0 : MB = 0 (00H-7FH)
MB = 15 (80H-FFH)
MBE = 1 : MB = MBS (MBS = 0, 1, 15)
*4
MB = 15, fmem = FB0H-FBFH,
FF0H-FFFH
*5
MB = 15, pmem = FC0H-FFFH
*6
addr = 0000H-1F7FH
*7
addr = (Current PC) -15 to (Current PC) - 1
(Current PC) +2 to (Current PC) + 16
*8
caddr = 0000H-0FFFH (PC12 = 0) or
1000H-1F7FH (PC12 = 1)
*9
faddr = 0000H-07FFH
*10
taddr = 0020H-007FH
*11
MB = MBE . MBS
(MBS = 0, 1, 4, 5, 6, 7, 15)
*12
MBE = 0: MB = 0 (00H-7FH)
MB = 15 (80H-FFH)
MBE = 1: MB = MBS
(MBS = 0, 1, 4, 5, 6, 7, 15)
Data memory
addressing
Program
memory
addressing
Data memory
addressing
Remarks 1:
2:
3:
4:
5:
MB indicates memory bank that can be accessed.
In *2, MB = 0 regardless of MBE and MBS.
In *4 and *5, MB = 15 regardless of MBE and MBS.
*6 to *10 indicate areas that can be addressed.
When MBS is 4, 5, 6 or 7, addressing area is in the EEPROM area.
(4) Machine cycle field
In this field, S indicates the number of machine cycles required when an instruction having a skip
function skips. The value of S varies as follows:
• When no instruction is skipped .................................................................................. S = 0
• When 1-byte or 2-byte instruction is skipped ........................................................... S = 1
• When 3-byte instruction (BR !addr or CALL !addr) is skipped .............................. S = 2
Note : The GETI instruction is skipped in one machine cycle.
One machine cycle equals to one cycle of the CPU clock Φ, (=tCY), and can be changed in three
steps depending on the setting of the processor clock control register (PCC).
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