UPD161623 Ver la hoja de datos (PDF) - NEC => Renesas Technology

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Fabricante

UPD161623

528 OUTPUT TFT-LCD SOURCE DRIVER WITH RAM

NEC => Renesas Technology 

µ PD161623

5.2 Display Data RAM

This RAM stores dot data for display and consists of 3,168 bits (176 x 18) x 240 bits. Any address of this RAM can

be accessed by specifying an X address and an Y address.

Display data D0 to D17 transmitted from the CPU corresponds to the pixels on the LCD (refer to Table 5−8).

Figure 5−8. Display Data RAM

D17

D16

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Dot 1

Dot 2

Dot 3

Pixel 1 (= 1 X address)

LCD panel

Pixel 1

Pixel 1

00H

Pixel 2

Pixel 2

01H

Pixel 3

Pixel 3

02H

Pixel 4

Pixel 4

03H

Pixel 5

Pixel 5

04H

Pixel 6

Pixel 6

05H

Pixel 7

Pixel 7

06H

Pixel 8

Pixel 8

07H

5.2.1 X address circuit

An X address of the display data RAM is specified by using the X address register (R6) as shown in Figure 5−9.

The specified X address is incremented by one each time display data is written or read.

In the increment mode, the X address is incremented up to AFH. If more display data is written or read, the Y

address is incremented, and the X address returns to 00H.

5.2.2 Y address circuit

A Y address of the display data RAM is specified by using the Y address register (R7) as shown in Figure 5−9.

The Y address is incremented each by one when one each time display is written or read and X address is

incremented to last address.

When the Y address has been incremented up to EFH and the X address up to the final address, if further display

data is read or written, the X and Y addresses return to 00H.

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Data Sheet S15817EJ2V0DS

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