UPD16782 Ver la hoja de datos (PDF) - NEC => Renesas Technology
Número de pieza
componentes Descripción
Fabricante
UPD16782
NEC => Renesas Technology
UPD16782 Datasheet PDF : 26 Pages
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µPD16782
Switching Characteristics (TA = −30 to +85°C, VDD1 = 3.0 to 5.5 V, VDD2 = 5.0 V ± 0.5 V, VSS1 = VSS2 = 0 V)
Parameter
Symbol
Condition
MIN.
TYP.
MAX.
Unit
Start pulse propagation delay
tPHL
time
tPLH
CL = 20 pF
CL = 20 pF
10
54
ns
10
54
ns
Clock frequency 1
fCLK 1
15
MHz
Clock frequency 2
fCLK 2
With 3-phase clock input
8
MHz
Logic input capacitance
CI1
Other than STHL, STHR
15
pF
STHL, STHR input capacitance CI2
STHL, STHR
20
pF
Video input capacitance
C3
C1 to C3, VVI = 2.0 V
50
pF
Timing Requirements (TA = −30 to +85 °C, VDD1 = 3.0 to 5.5 V, VDD2 = 5.0 V ± 0.5 V, VSS1 = VSS2 = 0 V)
Parameter
Symbol
Condition
MIN.
TYP.
MAX.
Unit
Clock pulse width
PWCLI
Duty = 50%
33
ns
Start pulse setup time
tSETUP
8
ns
Start pulse hold time
tHOLD
8
ns
Reset pulse width
PWRES
66
ns
INH setup time
tISETUP
33
ns
INH hold time
tIHOLD
33
ns
Reset-INH time
tR-I
81
ns
INH pulse width
PWINH
5
CLK
Remark Keep the rise and fall times of the logic input signals to within tr = tf = 5 ns (10 to 90%).
As an example, the switching characteristic wave of CLI1 is defined on the next page.
22
Data Sheet S15806EJ1V0DS
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