HV7121B Ver la hoja de datos (PDF) - Hyundai Micro Electronics

Número de pieza

componentes Descripción

Fabricante

HV7121B

CMOS IMAGE SENSOR With 8-bit ADC

Hyundai Micro Electronics 

Electronics Industries Co., Ltd.

System IC Division

HV7121B

CMOS IMAGE SENSOR

With 8-bit ADC

(9) VSYNC Blanking Time Register

(Higher byte : Address 22h, default : 00h, R/W)

(Lower byte : Address 23h, default : 03h, R/W)

The VSYNC blank, and time defines VSYNC active duration in pixel unit .

Note : HSYNC blanking, VSYNC blank are used to fit the CMOS sensor display timing to external timing

requirements.

(10) Integration time Register

(High byte : Address 25h, default : 00h, R/W)

(Middle byte : Address 26h, default : 01h, R/W)

(Low byte : Address 27h, default : f4h, R/W)

Each pixel has a photo diode in which the incoming photons are converted to electrons. Integration time mean

exposure time so these registers defines exposure time.

According to settings int_sel of Mode B register, the integration time is controlled with line or pixel unit.

Small value means short exposure time and large value means long exposure time for bright condition.

The value should be large for dark condition. Default value setting 500 lines, this value is useful for normal

office condition. If you stay in outdoor condition, this value should be decreased. But under dark condition, this

value should be increased to get a good image quality. Increasing value may decrease frame rate. Finally,

integration time is very important for frame rate and image quality.

For line mode exposure, register 26h and 27h are used. For pixel mode exposure, all three register 25h ~ 27h

are used. To control exposure time precisely, the pixel mode should be used. This register may be used for

Auto Exposure control.

(11) Operating Clock Divider (Address 28h, default:00h, R/W)

This register generates divided digital clock depending on the settings clk_div [3:0], digital block can divide

MCLK down by 1 through 2048 as shown in Table 1.

clk_div

[3:0]

units

clk_div[3:0]

0000

no division

0101

0001

MCLK/2

0111

0010

MCLK/4

1000

0011

MCLK/8

1001

0100

MCLK/16

1010

0101

MCLK/32

1011

units

MCLK/64

MCLK/128

MCLK/256

MCLK/512

MCLK/1024

MCLK/2048

Table 1. Operating Clock Control Register

This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any

responsibility for use of circuits described. NO patent licenses are implied.

DA41990615R_1.0

Division

18

1999 Hyundai System IC

Share Link: