LH5324500
CMOS 24M MROM
A-1 - A18
A19 - A20
CE
tCHZ
OE
tOHZ
tAHZ
D0 - D7
HI-Z
NOTE: HI-Z = High impedance.
DATA VALID
HI-Z
Figure 5. Byte Mode (BYTE = VIL)
When the address inputs become ‘High’ to both A19 and A20
5324500-5
A0 - A18
A19 - A20
CE
tCHZ
OE
tOHZ
tAHZ
D0 - D15
HI-Z
NOTE: HI-Z = High impedance.
DATA VALID
HI-Z
Figure 6. Word Mode (BYTE = VIH)
When the address inputs become ‘High’ to both A19 and A20
5324500-6
6