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TEA2028

APPLICATION NOTE

STMicroelectronics 

TEA2028 - TEA2029 APPLICATION NOTE

V.5.1 - Duty of different building blocks

V.5.1.1 - ”φ2” Phase comparator

This block generates a current proportional to the

phase difference between the phase reference ”φ2”

and the middle of the line flyback to be phase-

locked.

V.5.1.2 - Low-pass filter

- Rejects the parasitic component ”sum of phases”

- Smoothens the ”phase difference” component

- Allow ”phase adjustment” by generating an error

within the loop

V.5.1.3 - Phase modulator

Uses the line saw-tooth voltage to convert the

voltage delivered by the low-pass filter into a phase

corresponding to the line transistor turn-off control

signal.

V.5.1.4 - Flip-flop

Generates the turn-off control signal for a constant

time (fixed by the external capacitor), the phase of

which is set by the modulator.

V.5.1.5 - Output stage

- Delivers the control signal for line transistor driver

- Disables the output during start-up and protection

phases

V.5.1.6 - Line deflection stage

- Generates the saw-tooth current for line yoke

- Generates the high voltage required by picture

tube and other supply voltages

The line flyback information is provided by the

EHT transformer.

V.5.2 - Operation of building blocks

To provide an easier understanding of the subject,

the ”φ2” loop study will be covered as a function of

various time intervals and not as a function of

phase.

V.5.2.1 - Phase comparator ”φ2”

The operation is identical to that of ”φ1” loop.

The Vφ2 signal issued by logic block is phased with

respect to the middle of line sync pulse on Pin 27

and delayed by a 2.6µs interval so as to be at the

middle of blanking time on video cathodes.

The output current component ”2fH” is rejected by

the low-pass filter.

Figure 37

VCC

Vϕ2

I

550µA

i

Filter F(p)

Constant

Voltage

Line

Flyback

(LF)

-

The

average

current

is

i

=

2I

∆t

TH

Where : ∆t = tIN - tOUT

- The conversion gain is therefore :

A=

i

∆t

=

2I

TH

= 17µA/µs

At : I = 550µA and TH = 64µs, ”A” will remain

constant since ”I” is a multiple of ”IREF” current on

Pin 14.

Figure 38

Videp on

Pin 27

Vϕ1

0.3µs

Vϕ2

2.6µs

i

+I

0

-I

TH

LF

∆t

t IN t OUT

Video on

Cathodes

20/46

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