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SYMBOL
PARAMETER
CONDITIONS
αmute
mute attenuation
f = 20 Hz to 20 kHz
∆Ga
∆Gtrack
Zo
RL
Co(L)
Ro(L)
attenuator gain set error
gain tracking error
output impedance
output load resistance
output load capacitance
DC load resistance at output to ground
Gv = 0 to −32 dB
Gv = −32 to −68 dB
Gv = 0 to −56 dB
Chime adder
Gv(CHIME)
Vi(CHIME)(rms)
chime adder voltage gain
maximum chime input voltage (sine wave)
Vi(rms) = 1 V; chime input; chime adder on
main output voltage Vo(rms) < 1.5 V; chime input;
chime adder on
k
factor for Vi(CHIME) to avoid internal clipping k × Vi(CHIME)(p-p) < 5.7 V − Vo(p-p)
Digital part (SDA, SDAQ, SCL, SCLQ, FMHOLD, AFSAMPLE); note 18
VIH
HIGH-level input voltage
VIL
LOW-level input voltage
IIH
HIGH-level input current
IIL
LOW-level input current
VOL
LOW-level output voltage SDA
VCC = 0 to 9.5 V
IL = 3 mA
Digital part (SDAQ and SCLQ); note 18
Io(sink)
Rpu
CL
output sink current
pull-up resistance
load capacitance
Digital part (ADR); note 18
VIH
HIGH-level input voltage
VIL
LOW-level input voltage
IIH
HIGH-level input current
IIL
LOW-level input current
MIN.
100
75
−1
−2
−
−
2
0
4.7
TYP.
110
85
−
−
0
80
−
−
−
MAX. UNIT
−
dB
−
dB
+1 dB
+2 dB
1
dB
120 Ω
−
kΩ
10 nF
−
kΩ
−21 −20 −19 dB
2.0 −
−
V
0.22 0.25 0.28
3
5
9.7 V
−0.3 +0.3 +1.5 V
−10 −
+10 µA
−10 −
+10 µA
−
−
0.4 V
−
−
600 µA
−
−
22 kΩ
−
−
20 pF
3
−
−0.3 −
−
−
−80 −
VCC V
+1.5 V
150 µA
−
µA