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TEA1211

High efficiency auto-up/down DC/DC converter

Philips Electronics 

Philips Semiconductors

High efficiency auto-up/down

DC/DC converter

Preliminary specification

TEA1211HN

7.8 Synchronous rectification

For optimal efficiency over the whole load range,

synchronous rectifiers inside the TEA1211HN ensure that

in PFM mode during the phase where the coil current is

decreasing, all inductor current will flow through the low

ohmic power MOSFETs. Special circuitry is included

which detects that the inductor current reaches zero.

Following this detection, the digital controller switches off

the power MOSFET and proceeds regulation. Negative

currents are thus prevented.

current limitation protects the IC against overload

conditions, inductor saturation, etc. The current limit level

is user defined by the external resistor which must be

connected between pin ILIM and pin GND.

7.12 I2C-bus serial interface

The serial interface of the TEA1211HN is the I2C-bus.

A detailed description of the I2C-bus specification,

including applications, is given in the brochure: “The

I2C-bus and how to use it”, order no. 9398 393 40011.

7.9 PWM-only mode

When pin SYNC/PWM is HIGH, the TEA1211HN will use

PWM regulation independent of the load applied. As a

result, the switching frequency does not vary over the

whole load range.

7.10 External synchronisation

If a high frequency clock is applied to pin SYNC/PWM, the

switching frequency in PWM mode will be exactly that

frequency divided by 22. PFM mode is not possible if an

external clock is applied. The quiescent current of the

device increases when an external clock is applied.

In case no external synchronisation is necessary and the

PWM-only option is not used, pin SYNC/PWM must be

connected to ground.

7.11 Current limiter

If the peak input current of the TEA1211HN exceeds its

limit in PWM mode, current ramping is stopped

immediately, and the next switching phase is entered. The

7.12.1 CHARACTERISTICS OF THE I2C-BUS

The I2C-bus is for bidirectional, two-line communication

between different ICs or modules. The two lines are a

Serial Data line (SDA) and a Serial Clock Line (SCL). Both

lines must be connected to a positive supply via a pull-up

resistor (for best efficiency it is advised to use the input

voltage of the convertor). Data transfer may be initiated

only when the bus is not busy. In bus configurations with

ICs on different supply voltages, the pull-up resistors shall

be connected to the highest supply voltage. The I2C-bus

supports incremental addressing. This enables the system

controller to read or write multiple registers in only one

I2C-bus action. The TEA1211HN supports the I2C-bus up

to 400 kbit/s.

The I2C-bus system configuration is shown in Fig.6.

A device generating a message is a transmitter, a device

receiving a message is a receiver. The device that controls

the message is the master and the devices which are

controlled by the master are the slaves. The TEA1211HN

is a slave only device.

handbook, full paSgDewAidth

SCL

MASTER

TRANSMITTER /

RECEIVER

SLAVE

RECEIVER

SLAVE

TRANSMITTER /

RECEIVER

MASTER

TRANSMITTER

MASTER

TRANSMITTER /

RECEIVER

MDB006

Fig.6 I2C-bus system configuration.

2003 Oct 13

8

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