80C196NP Ver la hoja de datos (PDF) - Intel
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80C196NP Datasheet PDF : 51 Pages
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8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER
AC Characteristics — Demultiplexed Bus Mode
Test Coditions: Capacitive load on all pins = 50 pF, Rise and Fall Times = 3 ns.
Table 12. AC Characteristics, Demultiplexed Bus Mode
Symbol
Parameter
VCC = 4.5 V – 5.5 V
Min
Max
The 8XC196NP Will Meet These Specifications
FXTAL1
TXTAL1
TXHCH
TCLCL
TCHCL
TAVRL
TAVWL
TCLLH
TLLCH
TLHLH
Input frequency on XTAL1
Period, 1/FXTAL1
XTAL1 High to CLKOUT High/Low
CLKOUT Cycle Time
CLKOUT High Period
A19:0, CSx# Valid to RD# Low
A19:0, CSx# Valid to WR# Low
CLKOUT Low to ALE High
ALE Low to CLKOUT High
ALE Cycle Time
8
25
40
125
10
110
2TXTAL1
TXTAL1 – 10 TXTAL1 + 10
2TXTAL1 – 30
2TXTAL1 – 25
– 10
10
– 15
10
4TXTAL1
TLHLL
ALE High Period
TXTAL1 – 10
TAVLL
Address Valid to ALE Low
NA
TLLAX
Address Hold after ALE Low
NA
TLLRL
ALE Low to RD# Low
NA
TRLCH
RD# Low to CLKOUT High
0
TRLRH
RD# Low Period
2TXTAL1 – 10
TRHLH
RD# High to ALE High
TXTAL1 – 5
TRLAZ
RD# Low to Address Float
TLLWL
ALE Low to WR# Low
NA
TWLCH WR# Low to CLKOUT High
–5
TQVWH Data Valid before WR# High
3TXTAL1 – 37
TCHWH CLKOUT High to WR# High
– 15
TWLWH WR# Low Period
2TXTAL1 – 10
TWHQX Data Hold after WR# High
TXTAL1 – 20
TWHLH
WR# High to ALE High
TXTAL1 – 5
TWHBX BHE#, INST Hold after WR# High
TXTAL1 – 10
NOTES:
1. Exceeding the maximum specification causes additional wait states.
2. If wait states are used, add 2TXTAL1 × n, where n = number of wait states.
3. Assuming back-to-back bus cycles.
TXTAL1 + 10
15
TXTAL1 + 20
NA
10
5
TXTAL1 + 20
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns (2)
ns
ns
ns
ns
ns
ns (2)
ns (3)
ns
ns
ns
ns (2)
ns
ns (2)
ns
ns (3)
ns
25
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