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STV2116A

BUS CONTROLLED PAL/NTSC TV PROCESSOR

STMicroelectronics 

STV2116A

FUNCTIONAL DESCRIPTION

1 - DEFLECTION CIRCUIT

Note : [X,Y] : line number referred to the internal line counter

numbering

- Fully integrated synch. separator, with a low pass

filter, a black level alignment of the Y/CVBS input, a

slicing level at 2/3,1/3of the sync. pulse amplitude.

- Frame sync. pulse locked on 2 fH frequency to

perfect interlace.

- 500kHz VCO with an externalceramic resonator.

- Two phase locked loops

• the first PLL locks the VCO on the video signal

frequency,

• the second PLL compensates the line transistor

storage time.

- Three time constants for the first PLL.

• thelong timeconstantis usedfor normaloperation

• the short time constant is automatically used

during the frame retrace and in search mode of

VCR when the frame pulse is outside [258,264]

and [309,314].

• very long time constant when no video recognition

Time constants in normal operation

(automatic selection of time constants) :

50Hz input signal :

- short time constant : [306, 21]

- long time constant : the rest of the field

60Hz input signal :

- short time constant : [0, 16]

- long time constant : the rest of the field

• inhibition of the first PLL :

the first locked loop is opened from line 309 to

line 4.5 (or 314) in 50Hz mode. It isopened from

line 258 to line 5.5 (or 264) in 60Hz mode.

• the time constantsvalues are chosenby means

of external components.

• possibility to force the short time constant

through the bus.

• possibility to force the very long time constant

through the bus.

- Video identification : coincidence detector be-

tween the line synchro top and a line frequency

window from the firstPLL. The video identification

status is available in the output register of the I2C

bus decoder.

- Generation of burst gate pulses and line fre-

quency signals from the first PLL to drive the

chroma and video circuits. The burst gate pulse

is also sent to the sandcastle generator.

- Frame synchro window : [248, 352] catching

- Field frequency selection windows :

[248, 288] 6 0 Hz mo de s e le c t io n if two

consecutive frame pulses occur

inside this window,otherwise 50Hz

mode selection.

[288, 352] 50Hz mode selection window

- frame blanking pulse :

from line 0 to 21 in 50Hz mode

from line 0 to 16 in 60Hz mode

- Vertical output pulse is 10.5 lines long.

- Horizontal output pulse : 28µs line pulse on an

open collector output;

- Start up circuit : the horizontal output is at a high

level when VCC increases from 0 to 6.8V. On

shutting down, horizontal pulses are disabled

when VCC is below 6.2V.

- Soft-start circuit : the duty cycle of the horizontal

output is 78 % (Thigh/(Thigh + TLow))when VCC1

is lower than (0.75 x VCC2), during the rising time.

During the falling time, a 78% duty cycle HOUT

pulse is provided when VCC1 is lower than

(0.60 x VCC2).

- Possibility to disable the horizontal output pulse

through the bus (force a high level on HOUT).

- Horizontal position adjustment controlled by bus.

- Bus controlledoutput voltage to adjustthe vertical

amplitude; this voltage permits to adjust the slope

of the vertical sawtooth generated by the external

frame booster.

- Bus controlled vertical position ; the high level of

the vertical pulse permits to adjust the vertical

position.

- Bus controlled 4/3-16/9 selection : the low level

of the vertical pulse is 0.1V when 16/9 is selected,

2V when 4/3 is selected.

- Combined flyback input and sandcastle output

(Pin 37). Two thresholds on LFB/SCO Pin : The

lowest threshold (0.7V) permits to extract the line

blankingpulse; the highestthreshold(2V) permits

to extract the line pulse for PLL2. The sandcastle

signal at Pin 37 is used to control the external

baseband chroma delay line.

2 - FILTERS

- Integrated trap filter :

Q

=

fo

f−3dB

1

−

f−3dB

fo

Q = 1.7 at sharp. min

Q = 3.0 at sharp. max

Center frequency : - 4.43MHz,

3.58MHz for PAL, NTSC

- Integrated chroma bandpass : Q = 3.5

Center frequency : 4.43MHz, 3.58MHz

- Integrated delay line : Bandwidth = 8MHz

- Integrated low pass filter for deflection part.

- All filters are tuned with a reference phase locked

loop. The PLL consists of a lowpass filter, a phase

comparator,a loop filter (an externalcapacitor).The

referencesignalis the continuouscarrierwavefrom

the VCO (4.43MHz or 3.58MHz). The PLL adjusts

the center frequency of the lowpass so that it is

equal to the referencesignal.The tuning voltage of

the PLL is used to adjust all other filters.

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