ST72324J/K
Notes:
1. The contents of the I/O port DR registers are readable only in output configuration. In input configura-
tion, the values of the I/O pins are returned instead of the DR register contents.
2. The bits associated with unavailable pins must always keep their reset value.
3. These registers and the ICF2 and OCF2 flags are not present in the ST72324 but are present in the
emulator. For compatibility with the emulator, it is recommended to perform a dummy access (read or
write) to the TAIC2LR and TAOC2LR registers to clear the interrupt flags.
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