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ST10R172LT1 Ver la hoja de datos (PDF) - STMicroelectronics

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ST10R172LT1
ST-Microelectronics
STMicroelectronics ST-Microelectronics
ST10R172LT1 Datasheet PDF : 68 Pages
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ST10R172L - GENERAL PURPOSE TIMERS
9.2 GPT2
The GPT2 module provides precise event control and time measurement. It includes two
timers (T5, T6) and a capture/reload register (CAPREL). Both timers can be clocked with an
input clock derived from the CPU clock via a programmable prescaler or with external signals.
The count direction (up/down) for each timer is programmable by software or altered
dynamically by an external signal on a port pin (TxEUD). Concatenation of the timers is
supported by the output toggle latch (T6OTL) of timer T6, which changes its state on each
timer overflow/underflow.
The state of T6OTL may be used to clock timer T5, or may be output on a port pin T6OUT. The
overflows/underflows of timer T6 reload the CAPREL register. The CAPREL register captures
the contents of T5 based on an external signal transition on the corresponding port pin
(CAPIN), and timer T5 may optionally be cleared after the capture procedure. This allows
absolute time differences to be measured or pulse multiplication to be performedwithout
software overhead.
FCPU=50MHz
Timer input selection
000b
001b
010b
011b
100b
101b
110b
111b
Prescaler
Factor
Input
Frequency
Resolution
Period
4
8
16
32
64
128
256
512
12.5 MHz 6.25 MHz 3.125 1.563 781
391
195
97.6
MHz
MHz
KHz
KHz
KHz
KHz
80ns
160ns 320ns 640ns 1.28 us 2.56 us 5.12 us 10.24 us
5.24ms 10.49ms 20.97ms 41.94ms 83.88ms 167.7ms 335.5ms 671ms
Table 6 GPT2 timer input frequencies, resolution and periods
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