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ST10F272M Ver la hoja de datos (PDF) - STMicroelectronics

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ST10F272M Datasheet PDF : 175 Pages
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Pin data
ST10F272M
Table 1. Pin description (continued)
Symbol
Pin Type
Function
External access enable pin.
A low level applied to this pin during and after Reset forces the ST10F272M to
start the program from the external memory space. A high level forces
ST10F272M to start in the internal memory space. This pin is also used (when
Stand-by mode is entered, that is ST10F272M under reset and main VDD turned
EA / VSTBY
99
I off) to bias the 32 kHz oscillator amplifier circuit and to provide a reference
voltage for the low-power embedded voltage regulator which generates the
internal 1.8V supply for the RTC module (when not disabled) and to retain data
inside the Stand-by portion of the XRAM (16 Kbyte).
It can range from 4.5 to 5.5V. In running mode, this pin can be tied low during
reset without affecting 32 kHz oscillator, RTC and XRAM activities, since the
presence of a stable VDD guarantees the proper biasing of all those modules.
Two 8-bit bidirectional I/O ports P0L and P0H, bitwise programmable for input or
output via direction bit. Programming an I/O pin as input forces the
corresponding output driver to high impedance state. The input threshold of
Port 0 is selectable (TTL or CMOS).
In case of an external bus configuration, PORT0 serves as the address (A) and
as the address / data (AD) bus in multiplexed bus modes and as the data (D) bus
in demultiplexed bus modes.
Demultiplexed bus modes
P0L.0 - P0L.7, 100-107,
Data path width
P0H.0,
108, I/O
P0H.1 - P0H.7 111-117
P0L.0 – P0L.7:
8-bit
D0 – D7
16-bit
D0 - D7
P0H.0 – P0H.7: I/O
D8 - D15
Multiplexed bus modes
Data path width
P0L.0 – P0L.7:
P0H.0 – P0H.7:
8-bit
AD0 – AD7
A8 – A15
16-bit
AD0 - AD7
AD8 - AD15
Two 8-bit bidirectional I/O ports P1L and P1H, bitwise programmable for input or
output via direction bit. Programming an I/O pin as input forces the
corresponding output driver to high impedance state. PORT1 is used as the 16-
bit address bus (A) in demultiplexed bus modes: If at least BUSCONx is
configured such that the demultiplexed mode is selected, the pins of PORT1 are
118-125
128-135
I/O
not available for general purpose I/O function. The input threshold of Port 1 is
selectable (TTL or CMOS).
The pins of P1L also serve as the additional (up to eight) analog input channels
P1L.0 - P1L.7,
P1H.0 - P1H.7
for the A/D converter, where P1L.x equals ANy (Analog input channel y, where
y = x + 16). This additional function has a higher priority on demultiplexed bus
function.
The following PORT1 pins have alternate functions:
132
I P1H.4 CC24IO
CAPCOM2: CC24 capture input
133
I P1H.5 CC25IO
CAPCOM2: CC25 capture input
134
I P1H.6 CC26IO
CAPCOM2: CC26 capture input
135
I P1H.7 CC27IO
CAPCOM2: CC27 capture input
XTAL1
138
I XTAL1 Main oscillator amplifier circuit and/or external clock input
18/176

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