SP3221 Ver la hoja de datos (PDF) - Signal Processing Technologies

Número de pieza

componentes Descripción

Fabricante

SP3221

Intelligent +3.0V to +5.5V RS-232 Transceiver

Signal Processing Technologies 

RRCC

DC Power

Source

SW1

Contact-Discharge Module

RRSS

RV

SW2

CSS

Device

Under

Test

Figure 18. ESD Test Circuit for IEC1000-4-2

The circuit model in Figures 17 and 18 represent

the typical ESD testing circuit used for all three

methods. The CS is initially charged with the DC

power supply when the first switch (SW1) is on.

Now that the capacitor is charged, the second

switch (SW2) is on while SW1 switches off. The

voltage stored in the capacitor is then applied

through RS, the current limiting resistor, onto the

device under test (DUT). In ESD tests, the SW2

switch is pulsed so that the device under test

receives a duration of voltage.

For the Human Body Model, the current limiting

resistor (RS) and the source capacitor (CS) are

1.5kΩ an 100pF, respectively. For IEC-1000-4-

2, the current limiting resistor (RS) and the source

capacitor (CS) are 330Ω an 150pF, respectively.

The higher CS value and lower RS value in the

IEC1000-4-2 model are more stringent than the

Human Body Model. The larger storage capacitor

injects a higher voltage to the test point when

SW2 is switched on. The lower current limiting

resistor increases the current charge onto the test

point.

RS and RV add up to 330Ω for IEC1000-4-2.

30A

15A

0A

t=0ns

t=30ns

t➙

Figure 19. ESD Test Waveform for IEC1000-4-2

DEVICE PIN

TESTED

HUMAN BODY

IEC1000-4-2

MODEL

Air Discharge Direct Contact

Driver Outputs

Receiver Inputs

±15kV

±15kV

±15kV

±15kV

±8kV

±8kV

Table 4. Transceiver ESD Tolerance Levels

Level

4

4

Date: 7/21/04

SP3221E +3.0V to +5.5V RS-232 Transceiver

15

© Copyright 2004 Sipex Corporation

Share Link: