Audio Signaling Processor
20
MX803A PRELIMINARY INFORMATION
5.6 General Reset
Upon power-up the bits in the MX803A registers will be random (either “0” or “1”). A General Reset Command (01H) will
be required to reset all microcircuits on the C-BUS. It has the following effect on the MX803A:
Control Register
Status Register (bits 0, 1, 2)
Notone Timer
Tone Gen. 1 Reg. (2 bytes)
Tone Gen. 2 Reg. (2 bytes)
Gen. Purpose Reg.
Set as 00H
Set as 00H
Set as 00H
Set as 0000H
Set as 0000H
Set as 00H
Table 10: General Reset effect on MX803A
This sets the MX803A to Encoder High Band (625Hz to 3000Hz) with interrupts disabled and both timers set to 00H.
Both timers should be set up before interrupts are enabled to prevent initial, undesired interrupts.
6. Timing Information
Figure 8 shows timing parameters for two-way communication between the µC and the MX803A on the C-BUS.
CHIP SELECT
tCSOFF
tNXT
SERIAL CLOCK
COMMAND DATA
76543210
MSB
LSB
ADDRESS/COMMAND
BYTE
REPLY DATA
Logic level is not important
tNXT
tNXT
tCK
76543210
FIRST DATA BYTE
76543210
MSB
LSB
FIRST REPLY DATA BYTE
76 54 32 10
LAST DATA BYTE
765432 1 0
LAST REPLY DATA BYTE
tCSE
tHIZ
Figure 8: C-BUS Timing
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Doc. # 20480122.003