SN8P1706 FEATURES
♦ Memory configuration
OTP ROM size: 4K * 16 bits.
RAM size: 256 * 8 bits (bank 0 and bank 1).
♦ I/O pin configuration (Total 30 pins)
Input only: P0
Bi-directional: P1, P2, P4, P5
Wakeup: P0, P1
Pull-up resisters: P0, P1, P2, P4, P5
External interrupt: P0
P4 pins shared with ADC inputs.
♦ An 8-bit basic timer. (T0).
♦ Two 8-bit timer counters. (TC0, TC1).
♦ On chip watchdog timer.
♦ Eight levels stack buffer.
♦ 60 powerful instructions
Four clocks per instruction cycle
All of instructions are one word length.
Most of instructions are one cycle only.
All ROM area lookup table function (MOVC)
Support hardware multiplier (MUL).
SN8P1700
8-bit micro-controller build-in 12-bit ADC
♦ Seven interrupt sources
Four internal interrupts: T0, TC0, TC1, SIO.
Three external interrupts: INT0, INT1, INT2.
♦ An 8-channel ADC with 8-bit/12-bit resolution.
♦ One channel DAC 7bit resolution.
♦ SIO function.
♦ Two channel PWM output. (PWM0, PWM1)
♦ Two channel Buzzer output. (BZ0, BZ1)
♦ Dual clock system offers three operating modes
External high clock: RC type up to 10 MHz
External high clock: Crystal type up to 16 MHz
Internal low clock: RC type 16KHz(3V), 32KHz(5V)
Normal mode: Both high and low clock active
Slow mode: Low clock only
Sleep mode: Both high and low clock stop
♦ Package (Chip form support)
P-DIP 40 pins
Notice:
1. Declare “CHIP SN8P1706” in assembler.
2. Use @SET_PUR macro to control pull-up resister. Refer I/O chapter for detailed information
SONiX TECHNOLOGY CO., LTD
Page 14
Revision 1.94