AN87C196CA Ver la hoja de datos (PDF) - Intel
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componentes Descripción
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AN87C196CA Datasheet PDF : 33 Pages
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87C196CA 87C196CB
CCB (2018h Byte)
0 PD e ‘‘1’’ Enables Powerdown
1 BW0 e See Table
2 WR e ‘‘1’’ e WR BHE ‘‘0’’ e WRL WRH
3 ALE e ‘‘1’’ e ALE ‘‘0’’ e ADV
4 IRC0 e See Table
5 IRC1 e See Table
6 LOC0 e See Table
7 LOC1 e See Table
CCB1 (201Ah Byte)
0 CCR2 e ‘‘1’’ fetch CCB2 (‘‘0’’ for CA)
1 IRC2 e See Table
2 BW1 e See Table
3 WDE e ‘‘0’’ e Always Enabled
4
1
e Reserved Must Be ‘‘1’’
5
0
e Reserved Must Be ‘‘0’’
6 MEMSEL0 e See Table (‘‘1’’ for CA)
7 MEMSEL1 e See Table (‘‘1’’ for CA)
CCB2 (201Ch Byte) (CB Only)
0
0
e Reserved Must be ‘‘0’’
1 MODE16 e Select 16-Bit or 24-Bit Mode
( 2 REMAP e
‘‘0’’ Select EPROM CODERAM in Segment 0FFH only
‘‘1’’ Select Both Segment 0FFH and Segment 00H
3
1
e Reserved Must be ‘‘1’’
4
1
e Reserved Must be ‘‘1’’
5
1
e Reserved Must be ‘‘1’’
6
1
e Reserved Must be ‘‘1’’
7
1
e Reserved Must be ‘‘1’’
LOC1
0
0
1
1
LOC0
0
1
0
1
Function
Read and Write Protected
Write Protected Only
Read Protected Only
No Protection
MSEL1 MSEL0 ‘‘CB’’ Bus Timing Mode
0
0 Mode 0 (1-Wait KR)
0
1 Reserved Must Not Be Used
1
0 Reserved Must Not Be Used
1
1 Mode 3 (KR)
Mode 0
Designed to be similar to the 87C196KR bus
(1-Wait KR) timing with 1 automatic wait state
See AC Timings section for actual timings data
Mode 3 (KR) Designed to be similar to the 87C196KR bus
timing
See AC Timings section for actual timings data
IRC2
0
1
1
1
1
IRC1
0
0
0
1
1
IRC0
0
0
1
0
1
Max Wait States
Zero Wait States
1 Wait State
2 Wait States
3 Wait States
INFINITE
BW1
0
0
1
1
BW0
0
1
0
1
Bus Width
ILLEGAL
16-Bit Only
8-Bit Only
BW Pin Controlled
12
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