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SG6859 Ver la hoja de datos (PDF) - Fairchild Semiconductor

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SG6859 Datasheet PDF : 13 Pages
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Low Cost Green-Mode PWM Controller for Flyback Converters
Gate Output
The SG6859 BiCMOS output stage is a fast totem
pole gate driver. Cross conduction has been avoided to
minimize heat dissipation, increase efficiency, and
enhance reliability. The output driver is clamped by an
internal 17V Zener diode in order to protect power
MOSFET transistors against undesired over-voltage gate
signals.
Built-in Slope Compensation
The sensed voltage across the current sense resistor
is used for current mode control and pulse-by-pulse
current limiting. Built-in slope compensation will
improve stability and prevent sub-harmonic oscillations
due to peak-current mode control. The SG6859 has a
synchronized, positively-sloped ramp built-in at each
switching cycle. The slope of the ramp is:
0.36 × Duty
Duty (max .)
Noise Immunity
Noise from the current sense or the control signal can
cause significant pulse width jitter, particularly in
continuous-conduction mode. While slope compensation
helps alleviate these problems, further precautions should
still be taken. Good placement and layout practices should
be followed. Avoiding long PCB traces and component
leads, locating compensation and filter components near
the SG6859, and increasing the power MOS gate
resistance is advised.
Product Specification
SG6859
© System General Corp.
Version 1.2.1(IAO33.0067.B2)
-9-
www.sg.com.tw • www.fairchildsemi.com
September 28, 2007

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